IDT 89HPES48T12G2, User Manual

Page: 276 / 276

IDT JTAG Boundary Scan
PES48T12G2 User Manual 17 - 10 April 5, 2013
Notes If the Run-Test/Idle state is not entered, the output of the AC pins is not distinguishable from the output
of the DC EXTEST instruction.
EXTEST_PULSE
EXTEST_PULSE is an instruction listed in IEEE 1149.6 JTAG specification and is used to test AC pins
during boundary scan by shifting data from TDI to TDO within the Shift-DR-TAP controller State. This
instruction becomes effective on the falling edge of TCK in the Update-IR state.
After this instruction is asserted, the width of the pulse is the amount of time for which the JTAG state
machine is held in the Run-Test/Idle state.
If the Run-Test/Idle state is not entered, the output of the AC pins is not distinguishable from the output
of the DC EXTEST instruction.
RESERVED
Reserved instructions implement various test modes used in the device manufacturing process. The
user should not enable these instructions.
Usage Considerations
As previously stated, there are internal pull-ups on JTAG_TRST_N, JTAG_TMS, and JTAG_TDI.
However, JTAG_TCK also needs to be driven to a known value. It is best to either drive a zero on the
JTAG_TCK pin when it is not being used or to use an external pull-down resistor. In order to guarantee that
the JTAG does not interfere with normal system operation, the TAP controller should be forced into the Test-
Logic-Reset controller state by continuously holding JTAG_TRST_N low and/or JTAG_TMS high when the
chip is in normal operation. If JTAG will not be used, externally pull-down JTAG_TRST_N low to disable it.