IDT Multicast
PES48T12G2 User Manual
13 - 4
April 5, 2013
Notes
Note that the “block all” and “block untranslated” functions are performed at the ingress port on which
the multicast TLP was received. A received multicast TLP without errors is forwarded to egress ports as
described in the next section.
Multicast TLP Routing
A multicast TLP received without error by a function is forwarded as described in this section. Traditional
unicast routing rules do not apply to multicast TLPs. Unlike unicast routing rules that depend on whether the
TLP was received on the primary or secondary side of a PCI-to-PCI bridge and are thus different for
upstream and downstream ports, multicast TLP routing is symmetric. The same multicast routing rules
apply to all functions. A multicast TLP received by a function is forwarded to the virtual PCI bus in the
switch. All functions connected to the virtual PCI bus examine the multicast group ID associated with the
multicast TLP and perform the following actions:
–
The function on which the multicast TLP was received ignores the multicast TLP. If the multicast
enable (MCEN) bit is cleared, then the function ignores the multicast TLP. Associated each func-
tion is a multicast receive vector that contains a bit corresponding to each multicast group. If the
MCEN bit is set and the bit corresponding to the multicast group ID associated with the multicast
TLP is set in the multicast receive vector, then the multicast TLP is accepted by the function.
•
The multicast receive vector is contained in the Multicast Receive (MCRCV) fields of the Multi-
cast Receive Low (MCRCVL) and Multicast Receive High (MCRCVH) registers.
–
A function that accepts a multicast TLP forwards the TLP after multicast egress processing is
performed.
•
For a PCI-to-PCI bridge, forwarding a TLP means transmitting the TLP on the link associated
with the switch port corresponding to the PCI-to-PCI bridge.
–
If no function accepts a multicast TLP, then the TLP is silently discarded. This is not an error.
Note:
This section described multicast TLP routing from a functional perspective to aid in under-
standing. This functional definition does not represent the actual multicast routing implementa-
tion in the switch.
Multicast Egress Processing
Each switch function implements multicast overlay processing. When the Overlay Size (OVRSIZE) field
in the Multicast Overlay Base Address Low (MCOVRBARL) register is set to zero, multicast overlay
processing is disabled and multicast TLPs are forwarded without modification. When the OVRSIZE field is
non-zero, multicast overlay processing is performed on all multicast TLPs accepted by the function as
described below.
Address bits in the accepted multicast TLP with bit positions greater than or equal to OVRSIZE are
replaced by the corresponding address bits in the multicast overlay base address.
–
The multicast overlay base address is contained in the Multicast Overlay BAR Low (BARLOW)
field in the Multicast Overlay Base Address Low (MCOVRBARL) register and the Multicast
Overlay BAR High (MCOVRBARH) field in the Multicast Overlay Base Address High (MCOVR-
BARH) register.
Address bits less than OVRSIZE are not modified. As a result of multicast overlay processing, a multi-
cast TLP with an original address above 4 GB may be translated into a multicast TLP with address below 4
GB, and vice-versa. Thus, address translation may change the size of a multicast TLP header (e.g., from 4
DWords to 3 Dwords).
Multicast overlay processing is performed independently on all functions. Therefore, it is possible to
enable this capability in some functions and not others. The overlay base address associated with different
functions will likely have different values. This capability is available on both upstream and downstream
switch ports and operates in the same manner regardless of port type.
Summary of Contents for 89HPES48T12G2
Page 14: ...IDT Table of Contents PES48T12G2 User Manual vi April 5 2013 Notes...
Page 22: ...IDT Register List PES48T12G2 User Manual xiv April 5 2013 Notes...
Page 38: ...IDT PES48T12G2 Device Overview PES48T12G2 User Manual 1 16 April 5 2013 Notes...
Page 64: ...IDT Reset and Initialization PES48T12G2 User Manual 5 8 April 5 2013 Notes...
Page 82: ...IDT Link Operation PES48T12G2 User Manual 6 18 April 5 2013 Notes...
Page 98: ...IDT SerDes PES48T12G2 User Manual 7 16 April 5 2013 Notes...
Page 118: ...IDT Theory of Operation PES48T12G2 User Manual 8 20 April 5 2013 Notes...
Page 152: ...IDT SMBus Interfaces PES48T12G2 User Manual 12 20 April 5 2013 Notes...
Page 158: ...IDT Multicast PES48T12G2 User Manual 13 6 April 5 2013 Notes...