IDT Power Management
PES24N3A User Manual
7 - 2
April 10, 2008
Notes
The PES24N3A PCI-to-PCI bridges (i.e., ports) have the following behavior when in the D3
hot
power
management state:
–
A bridge accepts, processes and completes all type 0 configuration read and write requests.
–
A bridge accepts and processes all message requests that target the bridge.
–
All requests received by the bridge on the primary interface, except as noted above, are treated
as unsupported requests (UR).
–
Any error message resulting from the receipt of a TLP is reported in the same manner as when
the bridge is not in D3
hot
(e.g, generation of an ERR_NONFTAL message to the root).
–
Error messages resulting from any event other than the receipt of a TLP are discarded (i.e., no
error message is generated).
–
All completions that target the bridge are treated as unexpected completions (UC).
–
Completions flowing in either direction through the bridge are routed as normal. This behavior of
the bridge does not differ from that of the bridge when it is in the D0 power management state.
–
All request TLPs received on the secondary interface are treated as unsupported requests (UR).
PME Messages
The PES24N3A does not support generation of PME messages from the D3
cold
state. Downstream
ports (i.e., PCI-PCI bridges associated with downstream ports) support the generation of hot-plug PME
events (i.e., a PM_PME power management message) from the D3
hot
state. This includes both the case
when the downstream port is in the D3
hot
state or the entire switch is in the D3
hot
state.
The generation of a PME message by downstream ports necessitates the implementation of a PME
service time-out mechanism to ensure that PME messages are not lost. If the PME Status (PMES) bit in the
a downstream port’s PCI Power Management Control and Status (PMCSR) register is not cleared within the
time-out period specified in the PM_PME Time-Out (PMPMETO) field in the ports PM_PME Timer
(PMPMETIMER) register after a PM_PME message is transmitted, then the PM_PME message is retrans-
mitted and the timer is restarted.
Power Express Power Management Fence Protocol
Root complex takes the following steps to turn off power to a system.
–
The root places all devices in the D3 state
–
Upon entry to D3, all devices transition their links to the L1 state
–
The root broadcasts a PME_Turn_Off message.
–
Devices acknowledge the PME_Turn_Off message by returning a PME_TO_ACK message
From State
To State
Description
Any
D0 Uninitialized
Power-on fundamental reset.
D0 Uninitialized
D0 Active
PCI-PCI bridge configured by software
D0 Active
D3
hot
The Power Management State (PMSTATE) field in the
PCI Power Management Control and Status (PMCSR)
register is written with the value that corresponds to the
D3
hot
state.
D3
hot
D0 Uninitialized
The Power Management State (PMSTATE) field in the
PCI Power Management Control and Status (PMCSR)
register is written with the value that corresponds to D0
state.
D3
hot
D3
cold
Power is removed from the device.
Table 7.1 PES24N3A Power Management State Transition Diagram
Summary of Contents for 89HPES24N3A
Page 10: ...IDT Table of Contents PES24N3A User Manual iv April 10 2008 Notes...
Page 12: ...IDT List of Tables PES24N3A User Manual vi April 10 2008 Notes...
Page 14: ...IDT List of Figures PES24N3A User Manual viii April 10 2008 Notes...
Page 18: ...IDT Register List PES24N3A User Manual xii April 10 2008 Notes...
Page 64: ...IDT Link Operation PES24N3A User Manual 4 8 April 10 2008 Notes...
Page 88: ...IDT Power Management PES24N3A User Manual 7 4 April 10 2008 Notes...
Page 160: ...IDT Configuration Registers PES24N3A User Manual 9 66 April 10 2008 Notes...