IDT 89HPES24N3A, User Manual

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IDT Configuration Registers
PES24N3A User Manual 9 - 56 April 10, 2008
Notes
EEPROMINTF - Serial EEPROM Interface (0x42C)
19:18 SSMBMODE RW 0x0
Sticky
Slave SMBus Mode. The salve SMBus contains internal
glitch counters on the SSMBCLK and SSMBDAT signals
that wait approximately 1uS before sampling or driving
these signals. This field allows the glitch counter time to be
reduced or entirely removed. In some systems, this may
permit high speed slave SMBus operation.
0x0 -(normal) Slave SMBus normal mode. Glitch counters
operate with 1uS delay.
0x1 -(fast) Slave SMBus interface fast mode. Glitch
counters operate with 100nS delay.
0x2 -(disabled) Slave SMBus interface with glitch counters
disabled. Glitch counters operate with zero delay which
effectively removes them.
0x3 -reserved.
21:20 MSMBMODE RW 0x0
Sticky
Master SMBus Mode. The master SMBus contains internal
glitch counters on the MSMBCLK and MSMBDAT signals
that wait approximately 1uS before sampling or driving
these signals. This field allows the glitch counter time to be
reduced or entirely removed. In some systems, this may
permit high speed master SMBus operation.
0x0 -(normal) Master SMBus normal mode. Glitch counters
operate with 1uS delay.
0x1 -(fast) Master SMBus interface fast mode. Glitch
counters operate with 100nS delay.
0x2 -(disabled) Master SMBus interface with glitch counters
disabled. Glitch counters operate with zero delay which
effectively removes them.
0x3 -reserved.
31:22 Reserved RO 0x0 Reserved field.
1.
The MSMBCLK low minimum pulse width is equal to half the period programmed in this field. The value of 0x53, which cor-
responds to ~373 KHz, allows the min low pulse width to be satisfied. In systems where this timing parameter is not critical,
the operating frequency may be increased.
Bit
Field
Field
Name
Type
Default
Value
Description
15:0 ADDR RW 0x0 EEPROM Address. This field contains the byte address in
the Serial EEPROM to be read or written.
23:16 DATA RW 0x0 EEPROM Data. A write to this field will initiates a serial
EEPROM read or write operation, as selected by the OP
field, to the address specified in the ADDR field.
When a write operation is selected, the value written to this
field is the value written to the serial EEPROM. When a read
operation is selected, the value written to this field is ignored
and the value read from the serial EEPROM may be read
from this field when the DONE bit is set.
24 BUSY RO 0x0 EEPROM Busy. This bit is set when a serial EEPROM read
or write operation is in progress.
0x0 -(idle) serial EEPROM interface idle
0x1 -(busy) serial EEPROM interface operation in progress
Bit
Field
Field
Name
Type
Default
Value
Description