IDT 89HPES24N3A, User Manual

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IDT Configuration Registers
PES24N3A User Manual 9 - 42 April 10, 2008
Notes
AERCTL - AER Control (0x118)
AERHL1DW - AER Header Log 1st Doubleword (0x11C)
AERHL2DW - AER Header Log 2nd Doubleword (0x120)
AERHL3DW - AER Header Log 3rd Doubleword (0x124)
13 ADVISO-
RYNF
RW 0x1
Sticky
Advisory Non-Fatal Error Status. When this bit is set, the
corresponding bit in the AERCES register is masked. When
a bit is masked in the AERCES register, the corresponding
event is not reported to the root complex.
31:14 Reserved RO 0x0 Reserved field.
Bit
Field
Field
Name
Type
Default
Value
Description
4:0 FEPTR RO 0x0
Sticky
First Error Pointer. This field contains a pointer to the bit in
the AERUES register that resulted in the first reported error.
5 ECRCGC RWL 0x1 ECRC Generation Capable. This bit indicates if the device
is capable of generating ECRC.
6 ECRCGE RW 0x0
Sticky
ECRC Generation Enable. When this bit is set, ECRC gen-
eration is enabled.
7 ECRCCC RWL 0x1 ECRC Check Capable. This bit indicates if the device is
capable of checking ECRC.
8 ECRCCE RW 0x0
Sticky
ECRC Check Enable. When set, this bit enables ECRC
checking.
31:9 Reserved RO 0x0 Reserved field.
Bit
Field
Field
Name
Type
Default
Value
Description
31:0 HL RO 0x0
Sticky
Header Log. This field contains the 1st doubleword of the
TLP header that resulted in the first reported uncorrectable
error.
Bit
Field
Field
Name
Type
Default
Value
Description
31:0 HL RO 0x0
Sticky
Header Log. This field contains the 2nd doubleword of the
TLP header that resulted in the first reported uncorrectable
error.
Bit
Field
Field
Name
Type
Default
Value
Description
31:0 HL RO 0x0
Sticky
Header Log. This field contains the 3rd doubleword of the
TLP header that resulted in the first reported uncorrectable
error.
Bit
Field
Field
Name
Type
Default
Value
Description