IDT 89HPES16T4G2, Preliminary User'S Manual

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IDT Configuration Registers
PES16T4G2 User Manual 8 - 42 January 28, 2013
Notes
AERUESV - AER Uncorrectable Error Severity (0x10C)
Bit
Field
Field
Name
Type Default
Value
Description
0 UDEF RW 0x0
Sticky
Undefined. This bit is no longer used in this version of the speci-
ficiation.
3:1 Reserved RO 0x0 Reserved field.
4 DLPERR RW 0x1
Sticky
Data Link Protocol Error Severity. If the corresponding event is
not masked in the AERUEM register, then when the event occurs,
this bit controls the severity of the reported error. If this bit is set,
the event is reported as a fatal error. When this bit is cleared, the
event is reported as an uncorrectable error.
5 SDOENERR RW 0x1
Sticky
Surprise Down Error Severity. If the corresponding event is not
masked in the AERUEM register, then when the event occurs,
this bit controls the severity of the reported error. If this bit is set,
the event is reported as a fatal error. When this bit is cleared, the
event is reported as an uncorrectable error.
11:6 Reserved RO 0x0 Reserved field.
12 POISONED RW 0x0
Sticky
Poisoned TLP Status Severity. If the corresponding event is not
masked in the AERUEM register, then when the event occurs,
this bit controls the severity of the reported error. If this bit is set,
the event is reported as a fatal error. When this bit is cleared, the
event is reported as an uncorrectable error.
13 FCPERR RW 0x1
Sticky
Flow Control Protocol Error Severity. If the corresponding
event is not masked in the AERUEM register, then when the
event occurs, this bit controls the severity of the reported error. If
this bit is set, the event is reported as a fatal error. When this bit is
cleared, the event is reported as an uncorrectable error.
14 COMPTO RO 0x0 Completion Time-out Severity. A switch port does not initiate
non-posted requests on its own behalf. Therefore, this field is
hardwired to zero.
15 CABORT RO 0x0 Completer Abort Severity. The PES16T4G2 never responds to
a non-posted request with a completer abort.
16 UECOMP RW 0x0
Sticky
Unexpected Completion Severity. If the corresponding event is
not masked in the AERUEM register, then when the event occurs,
this bit controls the severity of the reported error. If this bit is set,
the event is reported as a fatal error. When this bit is cleared, the
event is reported as an uncorrectable error.
17 RCVOVR RW 0x1
Sticky
Receiver Overflow Severity. If the corresponding event is not
masked in the AERUEM register, then when the event occurs,
this bit controls the severity of the reported error. If this bit is set,
the event is reported as a fatal error. When this bit is cleared, the
event is reported as an uncorrectable error.
18 MALFORMED RW 0x1
Sticky
Malformed TLP Severity. If the corresponding event is not
masked in the AERUEM register, then when the event occurs,
this bit controls the severity of the reported error. If this bit is set,
the event is reported as a fatal error. When this bit is cleared, the
event is reported as an uncorrectable error.