IDT 89HPES16NT2, User Manual

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IDT PES16NT2 Device Overview
PES16NT2 User Manual 1 - 3 April 15, 2008
Notes
Figure 1.2 PES16NT2 Architectural Block Diagram
List of Features
‹
High Performance PCI Express Switch
– Sixteen PCI Express lanes (2.5Gbps), two switch ports
– Delivers 64 Gbps (8 GBps) of aggregate switching capacity
– Low latency cut-through switch architecture
– Support for Max Payload size up to 2048 bytes
– Supports one virtual channel and eight traffic classes
– PCI Express Base specification Revision 1.0a compliant
‹
Flexible Architecture with Numerous Configuration Options
– Supports automatic per port link width negotiation (x8, x4, x2, or x1)
– Static lane reversal on all ports
– Automatic polarity inversion on all lanes
– Supports locked transactions, allowing use with legacy software
– Ability to load device configuration from serial EEPROM
– Ability to control device via SMBus
‹
Non-Transparent Port
– Crosslink support on NTB port
– Four mapping windows supported
• Each may be configured as a 32-bit memory or I/O window
• May be paired to form a 64-bit memory window
– Interprocessor communication
• Thirty-two inbound and outbound doorbells
• Four inbound and outbound message registers
Transaction
Layer
Data Link
Layer
Physical
Layer MAC/PCS
PT NP CP
2-Port Switch Core
GPIO
Controller
Master
SMBus
Interface
Slave
SMBus
Interface
Input Frame Buffer
Route
Map
Table
Egress
Scheduler
Port Arbiter
Egress
Scheduler
Port Arbiter
Retry
SerDes
Buffer
Transaction
Layer
Data Link
Layer
Physical
Layer MAC/PCS
Retry
SerDes
Buffer
PT NP CP
Input Frame Buffer
Route
Map
Table
Port A
Upstream Port
Port C
Downstream Port