IDEC FC4A-C10R2, User Manual

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2: M
ODULE
S
PECIFICATIONS
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ICRO
S
MART
U
SER
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ANUAL
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Analog I/O Modules
Analog I/O modules are available in 3-I/O types, 2-, 4-, and 8-input types, and 1- and 2-output types. The input channel
can accept voltage and current signals, thermocouple and resistance thermometer signals, or thermistor signals. The output
channel generates voltage and current signals.
Analog I/O Module Type Numbers
Name I/O Signal I/O Points Category Type No.
Analog I/O Module
Voltage (0 to 10V DC)
Current (4 to 20mA)
2 inputs
END Refresh Type
FC4A-L03A1
Voltage (0 to 10V DC)
Current (4 to 20mA)
1 output
Thermocouple (K, J, T)
Resistance thermometer (Pt100)
2 inputs
FC4A-L03AP1
Voltage (0 to 10V DC)
Current (4 to 20mA)
1 output
Analog Input Module
Voltage (0 to 10V DC)
Current (4 to 20mA)
2 inputs FC4A-J2A1
Voltage (0 to 10V DC)
Current (4 to 20mA)
Thermocouple (K, J, T)
Resistance thermometer
(Pt100, Pt1000, Ni100, Ni1000)
4 inputs
Ladder Refresh Type
FC4A-J4CN1
Voltage (0 to 10V DC)
Current (4 to 20mA)
8 inputs FC4A-J8C1
Thermistor (NTC, PTC) 8 inputs FC4A-J8AT1
Analog Output Module
Voltage (0 to 10V DC)
Current (4 to 20mA)
1 output END Refresh Type FC4A-K1A1
Voltage (–10 to +10V DC)
Current (4 to 20mA)
2 outputs Ladder Refresh Type FC4A-K2C1
END Refresh Type and Ladder Refresh Type
Depending on the internal circuit design for data refreshing, analog I/O modules are categorized into two types.
END Refresh Type
Each END refresh type analog I/O module is allocated 20 data registers to store analog I/O data and parameters for con-
trolling analog I/O operation. These data registers are updated at ever y end processing while the CPU module is running.
WindLDR has ANST macro to program the analog I/O modules.
The CPU module checks the analog I/O configuration only once at the end processing in the first scan. If you have
changed the parameter while the CPU is running, stop and restar t the CPU to enable the new parameter.
Ladder Refresh Type
Each ladder refresh type analog I/O module can be allocated any data registers to store analog I/O data and parameters
for controlling analog I/O operation. The data registers are programmed in the ANST macro. Analog I/O data are updated
at the ladder step following the ANST macro. Analog I/O parameters are updated when the ANST macro is executed, so
analog I/O parameters can be changed while the CPU is running.
Analog I/O Module Category END Refresh Type Ladder Refresh Type
While CPU
is running
Parameter Refreshing At the end processing in the first scan When executing ANST macro
Analog I/O Data
Refreshing
At the end processing
In the step after ANST macro
(always refreshed whether input to ANST is
on or off)
While CPU
is stopped Analog Output Data
Refreshing
When M8025 (maintain outputs while CPU
stopped) is on, output data is refreshed.
When off, output is turned off.
Maintains output status when the CPU is
stopped. Output data can be changed using
STPA instruction while the CPU is stopped.
See page 26-21.
Data Register Allocation By default Optionally designated in ANST macro