13: S
HIFT
/ R
OTATE
I
NSTRUCTIONS
13-4
« FC4A M
ICRO
S
MART
U
SER
’
S
M
ANUAL
»
BCDLS (BCD Left Shift)
Applicable CPU Modules
Valid Operands
For the valid operand number range, see pages 6-1 and 6-2.
When T (timer) or C (counter) is used as S2, the timer/counter current value is read out.
The quantity of digits to shift designated as S2 can be 1 through 7.
Make sure that the source data determined by S1 and S1+1 is between 0 and 9999 for each data register. If either source
data is over 9999, a user program execution error will result, turning on special internal relay M8004 and the ERR LED on
the CPU module. When S2 is over 7, a user program execution error will also result.
Example: BCDLS
FC4A-C10R2/C
FC4A-C16R2/C
FC4A-C24R2/C
FC4A-D20K3/S3
FC4A-D20RK1/RS1 & FC4A-D40K3/S3
—
—
—
—
X
Operand
Function
I
Q
M
R
T
C
D
Constant
Repeat
S1 (Source 1)
Data for BCD shift
—
—
—
—
—
—
X
—
—
S2 (Source 2)
Quantity of digits to shift
X
X
X
X
X
X
X
1-7
—
When input is on, the 32-bit binar y data designated by S1 is conver ted into 8
BCD digits, shifted to the left by the quantity of digits designated by S2, and con-
ver ted back to 32-bit binar y data.
Valid values for each of S1 and S1+1 are 0 through 9999.
The quantity of digits to shift can be 1 through 7.
Zeros are set to the lowest digits as many as the digits shifted.
BCDLS
S1
*****
Before shift:
After shift:
0
2 3
1
MSD
S1
S1+1
Shift to the left
LSD
S2
*
4
6 7
5
0
1
3 4
2
5
7 0
6
0
When S2 = 1 (
digits to shift)
0
M8120 is the initialize pulse special internal relay.
When the CPU star ts operation, the MOV (move) instructions set 123 and
4567 to data registers D10 and D11, respectively.
Each time input I0 is turned on, the 32-bit binar y data of data registers
D10 and D11 designated by S1 is conver ted into 8 BCD digits, shifted to
the left by 1 digit as designated by operand S2, and conver ted back to 32-
bit binar y data.
Zeros are set to the lowest digits as many as the digits shifted.
Before shift:
After first shift:
0
2 3
1
D10
D11
Shift to the left
4
6 7
5
0
1
3 4
2
5
7 0
6
0
REP
SOTU
I0
S1 –
4567
D1 –
D11
S1
D10
S2
1
BCDLS
MOV(W)
M8120
REP
S1 –
123
D1 –
D10
MOV(W)
After second shift:
MSD
LSD
2
4 5
3
6
0 0
7
1
0
When S2 = 1 (
digits to shift)
Summary of Contents for FC4A-C10R2
Page 1: ...FC4A SERIES Micro Programmable Logic Controller User s Manual FC9Y B812 ...
Page 6: ...PREFACE 4 FC4A MICROSMART USER S MANUAL ...
Page 94: ...2 MODULE SPECIFICATIONS 2 74 FC4A MICROSMART USER S MANUAL ...
Page 184: ...6 ALLOCATION NUMBERS 6 20 FC4A MICROSMART USER S MANUAL ...
Page 218: ...8 ADVANCED INSTRUCTIONS 8 8 FC4A MICROSMART USER S MANUAL ...
Page 240: ...11 BINARY ARITHMETIC INSTRUCTIONS 11 8 FC4A MICROSMART USER S MANUAL ...
Page 244: ...12 BOOLEAN COMPUTATION INSTRUCTIONS 12 4 FC4A MICROSMART USER S MANUAL ...
Page 252: ...13 SHIFT ROTATE INSTRUCTIONS 13 8 FC4A MICROSMART USER S MANUAL ...
Page 274: ...15 WEEK PROGRAMMER INSTRUCTIONS 15 8 FC4A MICROSMART USER S MANUAL ...
Page 378: ...22 DUAL TEACHING TIMER INSTRUCTIONS 22 4 FC4A MICROSMART USER S MANUAL ...
Page 386: ...23 INTELLIGENT MODULE ACCESS INSTRUCTIONS 23 8 FC4A MICROSMART USER S MANUAL ...
Page 408: ...24 ANALOG I O CONTROL 24 22 FC4A MICROSMART USER S MANUAL ...
Page 426: ...26 COMPUTER LINK COMMUNICATION 26 6 FC4A MICROSMART USER S MANUAL ...