Chapter 7: Programmable interval Timer
Manual Number: 00650-004-5
Page 7-5
After any latching operation of a counter, the contents of its hold register must be read before any
subsequent latches of that counter will have any effect. If a status latch command is issued before
the hold register is read, then the first read will read the status, not the latched value. In this case,
after reading the status the latched value can then be read.
Programming Examples
Generating a Square Wave Output
To program Counters #1 and #2 for a 1 KHz output you need to divide the 1MHz crystal oscillator
input by 1,000. To obtain a symmetrical waveform, the divisor loaded into the counter should be an
even number. If it is an odd number, then one half of the waveform would be one input clock pulse
period longer than the other. A convenient divisor to use in counter #1 is 10 and counter #2 is 100
(because 10 x 100 = 1,000).
outportb(BASEA F, 0x76);
/* counter #1 to square wave mode */
outportb(BASEA F, 0xb6);
/* counter #2 to square wave mode */
outportb(BASEA D,10);
/* write lower byte, counter #1 */
outportb(BASEA D,0);
/* write upper byte, counter #1 */
outportb(BASEA E,100);
/* write lower byte, counter #2 */
outportb(BASEA E,0);
/* write upper byte, counter #2 */
Using Counter #0 as a Pulse Counter
Note that the counters are "down" counters so, when resetting them, its better to load them with a
full count value of 65,535 rather than zero.
outportb(BASEA F,0x30);
/* counter #0, mode 0 */
outportb(BASEA C,0xff);
/* counter #0 low load byte */
outportb(BASEA C,0xff);
/* counter #0 high load byte */
Measuring Frequency and Period
The two previous sections show how to count pulses and generate output frequencies. It is also
possible to measure frequency by raising the gate input of Counter 0 for a known time interval and
counting the number of clock pulses accumulated for that interval. The gating signal can be derived
from Counters #1 and #2 operating in a square wave mode.
Counter #0 can also be used to measure pulse width or half period of a periodic signal. The signal
should be applied to the gate input of Counter #0 and a known frequency (such as the 1MHz crystal
controlled oscillator) applied to the Counter #0 clock input. During the interval when the gate input
is low, Counter #0 is loaded with a full count of 65,535. When the gate input goes high, the counter
begins decrementing until the gate input goes back low at the end of the pulse. The counter is then
read and the change in count is a linear function of the duration of the gate input signal. Longer
pulse durations can be measured if Counters #1 and #2 are used as the input clock source for
Counter #0, or by using an external clock source.