Manual Number: 00650-004-5
Page 7-4
ADIO1600 Manual
For each counter you must specify in advance the type of read or write operation that you intend to
perform. You have a choice of loading/reading (a) the high byte of the count, or (b) the low byte of
the count, or (c) the low byte followed by the high byte. This last is of the most general use and is
selected for each counter by setting the RW1 and RW0 bits to ones. Of course, subsequent read/load
operations must be performed in pairs in this sequence or the sequencing flip-flop in the 8254 chip
will get out of step.
The readback command byte format is:
Base + 15 Read:
Counter Control Byte
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
B
1
1
T
N
C
A
T
S
2
C
1
C
0
C
0
CNT:
When is 0, latches the counters selected by bits C0-C2.
STA:
When is 0, returns the status byte of counters selected by C0-C2.
C0, C1, C2 :
When high, select a particular counter for readback. C0 selects Counter 0,
C1 selects Counter 1, and C2 selects Counter 2.
You can perform two types of operations with the readback command. When CNT=0, the counters
selected by C0 through C2 are latched simultaneously. When STA=0, the counter status byte is
read when the counter I/O location is accessed. The counter status byte provides information about
the current output state of the selected counter and its configuration. The status byte returned if
STA=0 is:
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
B
T
U
O
C
N
1
W
R
2
W
R
2
M
1
M
0
M
D
C
B
OUT:
Current state of counter output pin.
NC:
Null count. This indicates when the last count loaded into the counter
register has actually been loaded into the counter itself. The exact time of
load depends on the configuration selected. Until the count is loaded into
the counter itself, it cannot be read.
RW1 & RW0:
Read/Write command.
M2, M1, M0:
Counter mode.
BCD:
BCD = 0 is binary mode, otherwise counter is in BCD mode.
If both STA and CNT bits in the readback command byte are set low and the RW1 and RW0 bits
have both been previously set high in the counter control register (thus selecting two-byte reads),
then reading a selected counter address location will yield:
1st Read:
Status byte
2nd Read:
Low byte of latched data
3rd Read:
High byte of latched data