4 - 1
SECTION 4 CIRCUIT DESCRIPTION
4-1 RECEIVER CIRCUITS
4-1-1 DUPLEXER CIRCUIT
The transceiver has a duplexer (low-pass and high-pass fil-
ters) on the first stage from the antenna connector to sepa-
rate the signals into VHF and UHF signals. The low-pass fil-
ter (L15, L16, L78, C70–C72) is for VHF signals and the high-
pass filter (L44, L45, L82, C189, C190, C493) is for UHF sig-
nals. The separated signals are applied to each RF circuit.
4-1-2 VHF ANTENNA SWITCHING CIRCUIT
The antenna switching circuit functions as a low-pass filter
while receiving. However, its impedance becomes very high
while transmitting by turning ON diode (D18). Thus transmit
signals are blocked from entering the receiver circuits. The
antenna switching circuit employs a 1/4
λ
type diode switch-
ing system. The passed signals are then applied to the VHF
RF amplifier circuit.
4-1-3 VHF SQUELCH ATTENUATOR CIRCUIT
The attenuator circuit attenuates the signal strength to a
maximum of 10 dB to protect the RF amplifier from distortion
when excessively strong signals are received.
The current flow of the antenna switching circuit (D18) is con-
trolled by the [SQL] control via Q33. When the [SQL] control
is rotated clockwise deeper than 12 o’clock, the current of
D18 is increased. In this case, D18 acts as an attenuator.
4-1-4 VHF RF CIRCUIT
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
the tunable bandpass filter (D15, L25, L26, C115–C117). The
filtered signals are amplified at the VHF RF amplifier (Q16)
and are then enter another 3-stage tunable bandpass filter
(D11–D14, L20–L21, C94, C96–C105) to suppress unwant-
ed signals. and improve the selectivity. The filtered signals
are applied to the VHF 1st mixer circuit (Q15).
The tunable bandpass filters (D11–D13, D15) employ varac-
tor diodes to tune the center frequency of the RF passband
for wide bandwidth receiving and good image response
rejection. The PLL lock voltage is used for control voltage of
these varactor diodes. The PLL lock voltage is amplified at
the DC-amplifier (Q18) and then applied to the CPU (IC19,
pin 99). The CPU outputs the control signal to the varactor
diodes via the D/A converter (IC3).
4-1-5 VHF 1ST MIXER CIRCUIT
The 1st mixer circuit converts the received signal to a fixed
frequency of the 1st IF signal with a 1st LO (V-VCO output)
frequency.
The signals from the VHF RF circuit are mixed with the 1st
LO signal at the 1st mixer circuit (Q15) to produce a 15.65
MHz 1st IF signal.
4-1-6 VHF 1ST IF CIRCUIT
By changing the PLL frequency, only the desired frequency
will pass through a pair of crystal filters at the next stage of
the mixer.
The 1st IF signal from the VHF 1st mixer circuit is applied to
a pair of crystal filters (FI1) to suppress out-of-band signals
via a matching circuit (R61, C88). The filtered signal is ampli-
fied at the IF amplifier (Q40) and is then applied to the VHF
2nd mixer circuit (IC28).
4-1-7 VHF 2ND IF AND DEMODULATOR CIRCUITS
The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double superheterodyne system (which converts
receive signals twice) improves the image rejection ratio and
obtains stable receiver gain.
The FM IF IC (IC28) contains the 2nd local oscillator, 2nd
mixer, limiter amplifier, quadrature detector, and noise detec-
tor circuits, etc.
• VHF 2nd IF AND DEMODULATOR CIRCUITS
Mixer
16
Limiter
amp.
2nd IF filter
450 kHz
PLL IC
IC2
X1
15.2 MHz
X2
(15.2 MHz)
RSSI
IC28
TA31136F
14
1st IF (15.65 MHz) from Q40
"VSQL" signal to the CPU pin 97
11
10
9
8
7
5
3
AF signal
VR8V
Squelch level
adjustment R196
2
1
19
Active
filter
FI4
(FI5)
Noise
detector
FM
detector
