Evaluation Board Manual
PPC750FX Evaluation Board
Preliminary
Board Design
Page 22 of 115
750FXebm_ch2.fm
June 10, 2003
The supported media is Category 5A Unshielded Twisted Pair cable (UTP), accessed via two RJ45
connectors on the board. The two RJ45 connectors are in a common housing with integrated magnetics and
LEDS.
2.8 Flash Memory
The following describes how to access Flash memory directly on the board.
Eight-bit Flash memory is used on the PPC750FX board. No benchmarking impact is expected from the use
of a narrow rather than a wide Flash array. For performance work, one should expect to replace the initial
firmware support provided in the Flash with more optimized routines residing in DRAM.
The PPC750FX board contains 1MB of 8-bit wide Flash memory provided by two socketed 8b x 0.5Mb
modules, and 32MB of 32-bit wide Flash memory provided by two 16b x 16Mb module (+3.3V only) for data
or code storage. Additionally, 1MB of SRAM, provided as two 512 KB modules, can be used in this memory
space.
The board can be set to boot from 8-bit wide Flash with SRAM below it in memory or, alternatively, it can boot
from the SRAM with the 8-bit wide Flash below it in memory. This setup uses system controller chip select
BootCS.
When set up to use BootCS to boot from 8-bit wide Flash or from SRAM, the system controller chip select
CS0 is used to select the 32-bit wide Flash. If desired, these chip selects can be swapped so that the board
will boot from the 32-bit wide Flash using BootCS, then CS0 selects the 8-bit wide Flash/SRAM combination.
There are two switches used to control where the system controller chip selects are directed. See
Controller Initialization on page 42 for details on U17 switch 6 and U24 switch 7.
Figure 2-3. Board Ethernet Architecture
Ethernet
Ports
0
1
MV64360
System
Controller
MII
MII
2
1
BCM5222
Dual PHY
2
1
SMI 1
SMI 0
MDIO/MDC
2
J8064D628A
1
2
RJ45 Sockets
w/ Magnetics and LEDs
