IBM Power 595, Technical Overview And Introduction

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IBM Power 595 Technical Overview and Introduction
The Power 595 uses the existing MDC microcontroller found on each DCA to perform the
TPMD's functions and executes the firmware that run there. It uses communication between
the two MDCs on each processor book and the embedded node controller service processor
(NC) to measure the book-level power. The power is sensed by using the VRMs. To collect
the power consumption for the entire 595 server, the embedded node controller service
processor must pass each measurement to the embedded system controller service
processor for summation. Data collection is through the Ethernet connection (BPH). Voltage
and frequency adjustment for power save mode is always implemented by the service
processor because the system controller service processor have access to the redundant
clocks of the Power 595.
Table 2-9 indicates which functions the Power 595 supports.
Table 2-9 Functions available
Table 2-10 lists power saver mode frequency drops.
Table 2-10 Power saver mode frequency table
EnergyScale offers the following value proposals:
Finer data center control and management
Enables detailed power and temperature measurement data for trending and analysis,
configurable power and thermal limits, the reduction or elimination of over-provisioning
found in many data centers, and reduction or avoidance of costly capital construction in
new and existing data centers.
Enhanced availability
Enables continuous system operation, enhanced reliability, and better performance under
faulty power and thermal conditions. It allows you to better react to key component failure
such as power supply and cooling faults, thus lowering operating costs, and enables you
to configure power and thermal caps (where enabled).
Improved performance at lower costs
Enables you to dynamically maintain the power and temperature within prescribed limits,
reduce your cost by simplifying the facilities needed for power and cooling,
Server model Power
trending Power
saver
mode Power
capping Processor
core nap I/O Oversub-
scription
Power 575/595
(>= 4.0 GHz)
9 9
—
9 9 9
Power saver mode frequency table Frequency drop Estimated processor
power saved
5.0 GHz 595 20% 25-35%
4.2 GHz 595 without GX Dual Port RIO-2 Attach 14% 20-30%
4.2 GHz 595 with GX Dual Port RIO-2 Attach 5% 5-10%
Note: Required minimum firmware and software levels:
EM330; Active Energy Manager 3.1, IBM Director 5.20.2
HMC V7 R320.0 - However, it is recommended that HMC code level is equal to or
higher than firmware for additional feature support.