IBM IC35L040AVVN07-0 - 40GB IDE Deskstar 120GXP 7200RPM UATA-100..., Specifications

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9.5 Overlapped and queued feature
Overlap allows devices to perform a bus release so that the other device on the bus may be used. To
perform a bus release the device clears both DRQ and BSY to zero. When selecting the other device
during overlapped operations, the host shall disable interrupts via the nIEN bit on the currently selected
device before writing the Device/Head register to select the other device.
The only commands that may be overlapped are
('CC'h) Write DMA Queued
('A2'h) Service
('C7'h) Read DMA Queued
('00'h) NOP (with 01h subcommand code)
For the READ DMA QUEUED and WRITE DMA QUEUED commands, the device may or may not perform
a bus release. If the device is ready to complete the execution of the command, it may complete the
command immediately. If the device is not ready to complete the execution of the command, the device
may perform a bus release and complete the command via a service request.
Command queuing allows the host to issue concurrent commands to the same device. Only commands
included in the overlapped feature set may be queued. If a queue exists when a non-queued command is
received, the nonqueued command shall be aborted and the commands in the queue shall be discarded.
The ending status shall be ABORT command and the results are indeterminate.
The maximum queue depth supported by a device is indicated in word 73 of Identify Device information.
A queued command shall have a Tag provided by the host in the Sector Count register to uniquely identify
the command. When the device restores register parameters during the execution of the SERVICE
command, this Tag shall be restored so that the host may identify the command for which status is being
presented. If a queued command is issued with a Tag value that is identical to the Tag value for a com-
mand already in the queue, the entire queue is aborted including the new command. The ending status is
ABORT command and the results are indeterminate. If any error occurs, the command queue is aborted.
When the device is ready to continue processing a bus released command and BSY and DRQ are both
cleared to zero, the device requests service by setting SERV to one, setting a pending interrupt, and
asserting INTRQ if selected and if nIEN is cleared to zero. SERV shall remain set until all commands
ready for service have been serviced. The pending interrupt shall be cleared and INTRQ negated by a
Status register read or a write to the Command register.
When the device is ready to continue processing a bus released command and BSY or DRQ is set to one
(i.e., the device is processing another command on the bus), the device requests service by setting SERV
to one. SERV shall remain set until all commands ready for service have been serviced. At command
completion of the current command processing (i.e., when both BSY and DRQ are cleared to zero), the
device shall process interrupt pending and INTRQ per the protocol for the command being completed. No
additional interrupt shall occur due to other commands ready for service until after the SERV bit of the
device has been cleared to zero.
When the device receives a new command while queued commands are ready for service, the device
shall execute the new command and process interrupt pending and INTRQ per the protocol for the new
command. If the queued commands ready for service still exist at command completion of this command,
SERV remains set to one but no additional interrupt shall occur due to commands ready for service.
When queuing commands, the host shall disable interrupts via the nIEN bit before writing a new command
to the Command register and may re-enable interrupts after writing the command. When reading status at
command completion of a command, the host shall check the SERV bit since the SERV bit may be set
because the device is ready for service associated with another queued command. The host receives no
additional interrupt to indicate that a queued command is ready for service.
Deskstar 120GXP hard disk drive specifications
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