HUAWEI MU739 HSPA+ LGA Module
Hardware Guide
Description of the Application Interfaces
Issue 01 (2011-08-24)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
15
Table 3-1
Definitions of pins on the LGA interface
PIN
No.
Pin Name
I/
O
Description
DC Characteristics (V)
Normal
MUX
Min
Typical Max
1
NC
-
No connect
-
-
-
2
JTAG_TDO
O
JTAG Serial Data Out
-0.3
1.8
2.1
3
NC
-
No connect
-
-
-
4
NC
-
No connect
-
-
-
5
NC
-
No connect
-
-
-
6
GPIO1
I/O
General I/O pins. The
function of these pins has
not been defined. Optional
-0.3
1.8
2.1
7
NC
-
No connect
-
-
-
8
JTAG_TRST_N
O
JTAG Reset/Module enable -0.3
1.8
2.1
9
RESOUT_N
O
Reset output
-0.3
1.8
2.1
10
JTAG_TMS
I
JTAG State machine
control signal
-0.3
1.8
2.1
11
JTAG_TDI
I
JTAG Serial Data Input
-0.3
1.8
2.1
12
JTAG_TCK
I
JTAG clock input
-0.3
1.8
2.1
13
ON1
I
Turn on the module, high
active
-0.3
1.8
2.1
14
HSIC_HOST_ACTIVE
I
HSIC Host Active;
Inactive: the host controller
is switched off;
Active: the host controller is
switched on. Used to
synchronize enumeration.
-0.3
1.8
2.1
15
HSIC_SLAVE_WAKE
UP
I
HSIC Slave Wakeup, used
by MU739 in L0 to indicate
that link can be switched to
L2 because MU739 has no
data to transfer.
-0.3
1.8
2.1
16
GPIO2
I/O
General I/O pins. The
function of these pins has
not been defined. Optional
-0.3
1.8
2.1
17
SLEEP_STATUS
O
Indicates the sleep status of
MU739
H: MU739 is awake,
L: MU739 is in sleep
-0.3
1.8
2.1
draft2