HP E2470A, Manual

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Signal-to-Connector Mapping
The following tables shows the preprocessor PGA socket pin mapping
and the electrical interconnections implemented with the
preprocessor interface. Table 3-1 is the HP E2470A State pod list.
Table 3-2 is the HP E2470A Timing pod list. Table 3-3 is the
MC68HC16Y1 signal to HP E2470A PGA connector list. The "Shield"
signal is connected to the preprocessor interface ground but does not
correspond to any particular MC68HC16Y1 GND pin.
State Connector Signal Definition
The following table defines the state connectors, the logic analyzer bit
assignments, and the label/sublabel(s) to which a signal belongs. This table
aids in reconfiguring the logic analyzer to match a particular microcontroller
configuration.
TABLE 3-1 E2470A State Connector Signal List
SIGNAL
NAME E2470A STATE
CONNECTOR PIN ANALYZER
BIT STATE
LABEL STATE
SUBLABEL STATE
SUBLABEL
DATA0 1-37 1- 0 DATA
DATA1 1-35 1- 1 DATA
DATA2 1-33 1- 2 DATA
DATA3 1-31 1- 3 DATA
DATA4 1-29 1- 4 DATA
DATA5 1-27 1- 5 DATA
DATA6 1-25 1- 6 DATA
DATA7 1-23 1- 7 DATA
DATA8 1-21 1- 8 DATA
DATA9 1-19 1- 9 DATA
DATA10 1-17 1-10 DATA
DATA11 1-15 1-11 DATA
DATA12 1-13 1-12 DATA
DATA13 1-11 1-13 DATA
3–7