HP 5305 B, Operating And Service Manual

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Model 5305B
Theory of Operation
9E-4-27. This puts a step in the loop bandwidth at about
300 Hz input, increasing loop bandwidth drastically above
300 Hz. (Higher loop bandwidth is allowable at higher input
frequencies.) This greatly reduces acquisition time for a 10
kHz input.
9E-4-28. This "bend" in the VCO curve is accomplished by
CR24 and R90. The corrected tuning voltage is the voltage
between Q16's emitter and the +12 volt supply. The current
is set by the resistance between those points. For corrected
tuning voltages less than about 2 volts (actual tuning voltage
above +9.4 vots), the tri-diode CR24 is off and out of the
circuit. The effective resistance is R90 plus R83, or about
6500 ohms. For larger corrected tuning voltages (higher
frequencies), the tri-diode is on and shorts R90, removing it
from the circuit. Now the effective resistance is R83, or 270
ohms.
9E-4-29. MISCELLANEOUS A1 CIRCUITS. R84 (330K
ohm) sets the lowest VCO frequency at about 25 kHz,
corresponding to a 25 Hz input. Otherwise, the VCO could
actually go to 0 Hz, and the phase detector outputs would go
high because the VCO would appear to be locked to a 0 Hz
input (no input). This would turn off the search indicator.
C47 (100 pF) sets the width of the narrow low-going pulse
at the VCO output, U24C(8). Diode CR17 prevents the
tuning voltage from going too low when the loop tries to
acquire an excessive high input signal (above 11 kHz). Pin 3
of the loop amplifier is biased at + 1.5 volts. This forces pin
2 to also be at + 1.5V which is a good bias point to allow
proper operation of the diode switches.
9E-4-4
9E-4-30. 1300 MHz
÷
Circuit
9E-4-31. The A2 board amplifies the Channel A signal and
then divides it by four before sending it to A1 via J2(9). U26
divides the EECL signal by two before Q18 converts the
signal to ECL. Another divide-by-two stage is provided by
U25. Differential amplifier Q12 and Q13 converts the signal
to a positive driven ECL (H = 4.3V, L = 3.2V). Q11
provides a low impedance to U12's input.
9E-4-33. The 1300 MHz Amplifier assembly (A2) consists
of circuitry to amplify, prescale, and detect signals up to
1300 MHz. Input signals are routed through a protective fuse
F1 to the 1.3 GHz limiter circuitry. The limiters consist of
CR2, 7, 1, 4 and limit the input to approximately 5V rms. A
voltage controlled attenuator made up of pin diodes CR5, 6,
8, and 9 provides variable attenuation as determined by an
AGC circuit.
9E-4-34. The attenuator output connects to U2 which
provides 20-24 dB gain. U3 divides the signal by 2 and
routes it to U4 where it is divided by 2 again. Since U3 has
no Schmitt trigger, U3 is set for maximum sensitivity.
Operating at maximum sensitivity gives U3 a tendency to
oscillate when no input signal is applied. To maintain high
sensitivity and prevent oscillations, R22 is adjusted to
desensitize U3 when the ARM line is high and produce high
sensitivity when the ARM line is low. This allows the
counter readings to "snap on" from no input signal to the
exact reading when a signal is applied. The amount of "snap
on" feedback is controlled by A1R71. The greater the "snap
on" feedback, the less the possibility of partial counts, but
also the lower the sensitivity.
9E-4-35. As the input level increases, the level into A2U1
increases. A bridge circuit comprised of CR11, CR12 and
associated resistors including R13 which balances the
bridge. As the input level to the bridge increases, the
rectified bridge output drives the input to U1 to cause the
output of U1 to go low. This reduces the amount of current
through A1R9, R1 (sen. pot), L4, L1, CR6, CR8, and R11.
As the current through this path decreases, the resistance of
the PIN diodes (CR6, 8) increases to offer more attenuation
to the input signal. Similarly, the current increases through
CR9, R10, R1, R3, R6, R7, CR5 and R2, which decreases
the resistance of CR5 and CR9 to shunt more of the signal to
ground through C5 and C9.
Figure 9E-4-3. VCO Characteristics
9E-4-32. A2 1300 MHZ AMPLIFIER ASSEMBLY