Rev. 1.21
146
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HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
UART Module Power Down and Wake-up
When the
f
SYS
is off, the UART will cease to function. All clock sources to the module are shutdown.
If the
f
SYS
is off while a transmission is still in progress, then the transmission will be paused until
the UART clock source derived from the microcontroller is activated. In a similar way, if the MCU
enters the Power Down Mode while receiving data, then the reception of data will likewise be
paused. When the MCU enters the Power Down Mode, note that the USR, UCR1, UCR2, transmit
and receive registers, as well as the BRG register will not be affected. It is recommended to make
sure first that the UART data transmission or reception has been finished before the microcontroller
enters the Power Down mode.
The UART function contains a receiver RX pin wake-up function, which is enabled or disabled
by the WAKE bit in the UCR2 register. If this bit, along with the UART enable bit, UARTEN, the
receiver enable bit, RXEN and the receiver interrupt bit, RIE, are all set before the MCU enters
the Power Down Mode, then a falling edge on the RX pin will wake up the MCU from the Power
Down Mode. Note that as it takes certain system clock cycles after a wake-up, before normal
microcontroller operation resumes, any data received during this time on the RX pin will be ignored.
For a UART wake-up interrupt to occur, in addition to the bits for the wake-up being set, the global
interrupt enable bit, EMI, and the UART interrupt enable bit, UARE, must also be set. If these two
bits are not set then only a wake up event will occur and no interrupt will be generated. Note also
that as it takes certain system clock cycles after a wake-up before normal microcontroller resumes,
the UART interrupt will not be generated until after this time has elapsed.
Interrupts
Interrupts are an important part of any microcontroller system. When an external event or an
internal function such as a Timer Module or an A/D converter requires microcontroller attention,
their corresponding interrupt will enforce a temporary suspension of the main program allowing the
microcontroller to direct attention to their respective needs. The device contains an external interrupt
and internal interrupts functions. The external interrupt is generated by the action of the external
INTn pins, while the internal interrupts are generated by various internal functions such as the TMs,
Time Base, EEPROM, SIM, UART and the A/D converter.
Interrupt Registers
Overall interrupt control, which basically means the setting of request flags when certain
microcontroller conditions occur and the setting of interrupt enable bits by the application program,
is controlled by a series of registers, located in the Special Purpose Data Memory, as shown in
the accompanying table. The number of registers depends upon the device chosen but fall into
three categories. The first is the INTC0~INTC3 registers which setup the primary interrupts, the
second is the MFI0~MFI2 registers which setup the Multi-function interrupts. Finally there are
INTEG0~INTEG1 registers to setup the external interrupt trigger edge type.
Each register contains a number of enable bits to enable or disable individual registers as well as
interrupt flags to indicate the presence of an interrupt request. The naming convention of these
follows a specific pattern. First is listed an abbreviated interrupt type, then the (optional) number of
that interrupt followed by either an “E” for enable/disable bit or “F” for request flag.