Rev. 1.40
66
March 29, 2019
Rev. 1.40
67
March 29, 2019
HT45F23A/HT45F24A
TinyPower
TM
Flash MCU with OPA & Comparators
HT45F23A/HT45F24A
TinyPower
TM
Flash MCU with OPA & Comparators
Configuring the Event Counter Mode
In this mode, a number of internally changing logic events, occurring on the internal comparators
output, can be recorded by the Timer/Event Counter. To operate in this mode, the Operating Mode
Select bit pair, T0M1/T0M0 or T1M1/T1M0, in the Timer Control Register must be set to the correct
value as shown. Control Register Operating Mode Select Bits for the Event Counter Mode
Bit7
Bit6
0
0/1
In this mode, the comparator output, CMP1X or CMP2X, is used as the Timer/Event Counter
clock source, however it is not divided by the internal prescaler. After the other bits in the Timer
Control Register have been setup, the enable bit T0ON or T1ON, which is bit 4 of the Timer Control
Register, can be set high to enable the Timer/Event Counter to run. If the Active Edge Select bit T0E
or T1E, which is bit 3 of the Timer Control Register, is low, the Timer/Event Counter will increment
each time the external timer pin receives a low to high transition. If the Active Edge Select bit is
high, the counter will increment each time the external timer pin receives a high to low transition.
When it is full and overflows, an interrupt signal is generated and the Timer/Event Counter will
reload the value already loaded into the preload register and continue counting. The interrupt can
be disabled by ensuring that the Timer/Event Counter Interrupt Enable bit in the Interrupt Control
Register, INTC0, is reset to zero.
It should be noted that in the internal event counting mode, even if the microcontroller is in the
Power Down Mode, the Timer/Event Counter will continue to record externally changing logic
events on the timer input pin. As a result when the timer overflows it will generate a timer interrupt
and corresponding wake-up source.
Event Counter Mode Timing Chart (TnE=1)
Configuring the Pulse Width Measurement Mode
In this mode, the Timer/Event Counter can be utilised to measure the width of external pulses
applied to the external timer pin. To operate in this mode, the Operating Mode Select bit pair, T0M1/
T0M0 or T1M1/T1M0, in the Timer Control Register must be set to the correct value as shown.
Control Register Operating Mode Select Bits for the Pulse Width Measurement Mode
Bit7
Bit6
1
1
In this mode the internal clock, f
SYS
, is used as the internal clock for 8-bit Timer/Event Counter 0
and f
SUB
or f
SYS
/4 is used as the internal clock for 16-bit Timer/Event Counter 1. However, the clock
source, f
SYS
, for 8-bit timer is further divided by a prescaler, the value of which is determined by the
Prescaler Rate Select bits T0PSC2~T0PSC0, which are bits 2~0 in the Timer Control Register. After
the other bits in the Timer Control Register have been setup, the enable bit T0ON or T1ON, which
is bit 4 of the Timer Control Register, can be set high to enable the Timer/Event Counter, however it
will not actually start counting until an active edge is received on the external timer pin.