Rev. 1.00
148
October 26, 2018
Rev. 1.00
149
October 26, 2018
BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
a start bit, data bits and the invalid stop bit and the FERR flag will be set. The receiver must wait for
a valid stop bit before looking for the next start bit. The receiver will not make the assumption that
the break condition on the line is the next start bit. The break character will be loaded into the buffer
and no further data will be received until stop bits are received. It should be noted that the RIDLE
read only flag will go high when the stop bits have not yet been received. The reception of a break
character on the UART registers will result in the following:
• The framing error flag, FERR, will be set.
• The receive data register, TXR_RXR, will be cleared.
• The OERR, NF, PERR, RIDLE or RXIF flags will possibly be set.
Idle Status
When the receiver is reading data, which means it will be in between the detection of a start bit and
the reading of a stop bit, the receiver status flag in the USR register, otherwise known as the RIDLE
flag, will have a zero value. In between the reception of a stop bit and the detection of the next start
bit, the RIDLE flag will have a high value, which indicates the receiver is in an idle condition.
Receiver Interrupt
The read only receive interrupt flag RXIF in the USR register is set by an edge generated by the
receiver. An interrupt is generated if RIE=1, when a word is transferred from the Receive Shift
Register, RSR, to the Receive Data Register, TXR_RXR. An overrun error can also generate an
interrupt if RIE=1.
Managing Receiver Errors
Several types of reception errors can occur within the UART module, the following section describes
the various types and how they are managed by the UART.
Overrun Error – OERR
The TXR_RXR register is composed of a two byte deep FIFO data buffer, where two bytes can be
held in the FIFO register, while a third byte can continue to be received. Before this third byte has
been entirely shifted in, the data should be read from the TXR_RXR register. If this is not done, the
overrun error flag OERR will be consequently indicated.
In the event of an overrun error occurring, the following will happen:
• The OERR flag in the USR register will be set.
• The TXR_RXR contents will not be lost.
• The shift register will be overwritten.
• An interrupt will be generated if the RIE bit is set.
The OERR flag can be cleared by an access to the USR register followed by a read to the TXR_RXR
register.
Noise Error – NF
Over-sampling is used for data recovery to identify valid incoming data and noise. If noise is
detected within a frame the following will occur:
• The read only noise flag, NF, in the USR register will be set on the rising edge of the RXIF bit.
• Data will be transferred from the Shift register to the TXR_RXR register.
• No interrupt will be generated. However this bit rises at the same time as the RXIF bit which
itself generates an interrupt.
Note that the NF flag is reset by an USR register read operation followed by a TXR_RXR register
read operation.