Rev. 1.00
28
March 24, 2020
Rev. 1.00
29
March 24, 2020
BS83A04C
4-Key Enhanced Touch I/O Flash MCU
BS83A04C
4-Key Enhanced Touch I/O Flash MCU
Erasing the Emulated EEPROM
For Emulated EEPROM erase operation the desired erase page address should first be placed in
the EAR register. The number of the page erase operation is 16 words per page, therefore, the
available page erase address is only specified by the EAR4 bit in the EAR register and the content
of EAR3~EAR0 in the EAR register is not used to specify the page address. To erase the Emulated
EEPROM page, the EEREN bit in the ECR register must first be set high to enable the erase
function. After this the EER bit in the ECR register must be immediately set high to initiate an erase
cycle. These two instructions must be executed in two consecutive instruction cycles to activate an
erase operation successfully. The global interrupt bit EMI should also first be cleared to zero before
implementing any erase operations, and then set high again after a valid erase activation procedure
has completed. Note that the CPU will be stopped when an erase operation is successfully activated.
When the erase cycle terminates, the CPU will resume executing the application program. And the
EER bit will be automatically cleared to zero by the microcontroller, informing the user that the
data has been erased. The Emulated EEPROM erased page content will all be zero after an erase
operation.
Writing Data to the Emulated EEPROM
For Emulated EEPROM write operation, the desired write address should be placed in the EAR
register, and the data should first be placed in the ED0L/ED0H~ED3L/ED3H registers. The
number of the write operation is 4 words each time, therefore, the available write unit address is
only specified by the EAR4~EAR2 bits in the EAR register and the content of EAR1~EAR0 in
the EAR register is not used to specify the unit address. To write data to the Emulated EEPROM,
the EWREN bit in the ECR register must first be set high to enable the write function. After this
the EWR bit in the ECR register must be immediately set high to initiate a write cycle. These two
instructions must be executed in two consecutive instruction cycles to activate a write operation
successfully. The global interrupt bit EMI should also first be cleared to zero before implementing
any write operations, and then set high again after a valid write activation procedure has completed.
Note that the CPU will be stopped when a write operation is successfully activated. When the write
cycle terminates, the CPU will resume executing the application program. And the EWR bit will
be automatically cleared to zero by the microcontroller, informing the user that the data has been
written to the Emulated EEPROM.
Reading Data from the Emulated EEPROM
For Emulated EEPROM read operation the desired read address should first be placed in the EAR
register. To read data from the Emulated EEPROM, the ERDEN bit in the ECR register must first be
set high to enable the read function. After this a read cycle will be initiated if the ERD bit in the ECR
register is now set high. Note that the CPU will be stopped when the read operation is successfully
activated. When the read cycle terminates, the CPU will resume executing the application program.
And the ERD bit will be automatically cleared to zero by the microcontroller, informing the user
that the data has been read from the Emulated EEPROM. Then the data can be read from the ED0H/
ED0L data register pair by application program. The data will remain in the data register pair until
another read, write or erase operation is executed.
