Rev. 1.10
56
October 23, 2020
Rev. 1.10
57
October 23, 2020
BC66F5652
2.4GHz RF Transceiver A/D Flash MCU
BC66F5652
2.4GHz RF Transceiver A/D Flash MCU
page erase mode. The EEPROM address higher 3 bits used to specify the desired page location will
not be incremented. When the EEPROM address, internally generated, reaches the page boundary,
namely 0FH, the EEPROM address will stop at 0FH. The EEPROM address will not “roll over”.
For page erase operations the start address of the desired EEPROM page should first be placed in
the EEA registers and the dummy data to be written is placed in the EED registers. The maximum
data length for a page is 16 bytes. Note that the write operation to the EED register is used to tag
address, it must be implemented to determine which addresses to be erased. When the page dummy
data is completely written then the EREN bit in the EEC register should first be set high to enable
erase operations and the ER bit must be immediately set high to initiate the EEPROM erase process.
These two instructions must be executed in two consecutive instruction cycles. The global interrupt
enable bit EMI should also first be cleared before implementing an erase operation and then set
again after a valid erase activation procedure has completed.
As the EEPROM erase cycle is controlled using an internal timer whose operation is asynchronous
to microcontroller system clock, a certain time will elapse before the data will have been erased from
the EEPROM. Detecting when the erase cycle has finished can be implemented either by polling
the ER bit in the EEC register or by using the EEPROM interrupt. When the erase cycle terminates,
the ER bit will be automatically cleared to zero by the microcontroller, informing the user that the
page data has been erased. The application program can therefore poll the ER bit to determine when
the erase cycle has ended. After the erase operation is finished, the EREN bit will be set low by
hardware. The Data EEPROM erased page content will be 0000H after a page erase operation.
Write Operation to the EEPROM
Writing data to the EEPROM can be implemented by two modes for this device, byte write mode or
page write mode, which is controlled by the EEPROM operation mode selection bit, MODE, in the
EEC register.
Byte Write Mode
The EEPROM byte write operation can be executed when the mode selection bit, MODE, is cleared
to zero. For byte-write operations the required EEPROM address
must first be placed in the EEA
register and the data placed in the EED register. To initiate a write cycle, the write enable bit,
WREN, in the EEC register must first be set high to enable the write function. After this, the WR
bit in the EEC register must be immediately set high to initiate a write cycle. These two instructions
must be executed in two consecutive instruction cycles. The global interrupt bit EMI should also
first be cleared before implementing any write operations, and then set high again after a valid write
activation procedure has completed. Note that setting the WR bit high will not initiate a write cycle
if the WREN bit has not been set.
As the EEPROM write cycle is controlled using an internal timer whose operation is asynchronous
to microcontroller system clock, a certain time will elapse before the data will have been written into
the EEPROM. Detecting when the write cycle has finished can be implemented either by polling the
WR bit in the EEC register or by using the EEPROM interrupt. When the write cycle terminates,
the WR bit will be automatically cleared to zero by the microcontroller, informing the user that the
data has been written to the EEPROM. The application program can therefore poll the WR bit to
determine when the write cycle has ended. Note that a byte erase operation will automatically be
executed before a byte write operation is successfully activated.
Page Write Mode
Before a page write operation is executed, it is important to ensure that a relevant page erase
operation has been successfully executed. The EEPROM page write operation can be executed
when the mode selection bit, MODE, is set high. The EEPROM is capable of a 16-byte page write.
