344
PWDRL—PWM data register L
H'A6
14-bit PWM
Bit
Initial value
Read/Write
7
PWDRL7
0
W
6
PWDRL6
0
W
5
PWDRL5
0
W
4
PWDRL4
0
W
3
PWDRL3
0
W
0
PWDRL0
0
W
2
PWDRL2
0
W
1
PWDRL1
0
W
Lower 8 bits of PWM waveform generation data
SMR—Serial mode register
H'A8
SCI3
Bit
Initial value
Read/Write
7
COM
0
R/W
6
CHR
0
R/W
5
PE
0
R/W
4
PM
0
R/W
3
STOP
0
R/W
0
CKS0
0
R/W
2
MP
0
R/W
1
CKS1
0
R/W
Parity enable
0
Parity bit adding and checking disabled
1
Parity bit adding and checking enabled
Clock select 0, 1
0 0
1
1 0
1
ø clock
ø/4 clock
ø/16 clock
ø/64 clock
Multiprocessor mode
0
Multiprocessor communication function disabled
1
Multiprocessor communication function enabled
Stop bit length
0
1 stop bit
1
2 stop bits
Parity mode
0
Even parity
1
Odd parity
Character length
0
8-bit data
1
7-bit data
Communication mode
0
Asynchronous mode
1
Synchronous mode