Hitachi 32LD8600, Service Manual

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25
TFT TV Service Manual
11.23.3. Pin Connections and Descriptions
11.24. SN74CB3Q3305
11.24.1. General Description
The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate
voltage of the pass transistor, providing a low and flat ON-state resistance (r
on
). The low and flat ON-
state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data
input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive
loading and signal distortion on the data bus. Specifically designed to support high-bandwidth
applications, the SN74CB3Q3305 provides an optimized interface solution ideally suited for broadband
communications, networking, and data-intensive computing systems.
11.24.2. Features
• High-Bandwidth Data Path (Up To 500 MHz)
• 5-V Tolerant I/Os with Device Powered-Up or Powered-Down
• Low and Flat ON-State Resistance (r
on
) Characteristics Over Operating Range (r
on
= 3 Ÿ Typical)
• Rail-to-Rail Switching on Data I/O Ports
í
0- to 5-V Switching With 3.3-V VCC
í 0- to 3.3-V Switching With 2.5-V VCC
• Bidirectional Data Flow, With Near-Zero Propagation Delay
• Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C
io(OFF)
= 3.5 pF Typical)
• Fast Switching Frequency (f
OE
= 20 MHz Max)
• Data and Control Inputs Provide Undershoot Clamp Diodes
• Low Power Consumption (ICC = 0.25 mA Typical)
• VCC Operating Range From 2.3 V to 3.6 V
• Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
• Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
• I
off
Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II
• ESD Performance Tested Per JESD 22
í
2000-V Human-Body Model (A114-B, Class II)