6
Event Registers
Standard Event Status Register (SESR)
The Standard Event Status Register is an 8-bit register.
The Standard Event Status Register is cleared in the following situations:
• When a
*CLS
command is executed
• When an event register query (
*ESR?
) is executed
• When the instrument is powered on again
Bit 7
PON
Power-On Flag
Set to 1 when the power is turned on, or upon recovery from an
outage.
Bit 6
URQ
(Unused)
Not used by this instrument
User Request
Bit 5
CME
Command error (The command to the message terminator is ignored.)
This bit is set to 1 when a received command contains a syntactic or
semantic error:
•
Program header error
•
Incorrect number of data parameters
•
Invalid parameter format
•
Received a command not supported by the instrument
•
The specified data value is outside of the set range
Bit 4
EXE
Execution Error
This bit is set to 1 when a received command cannot be executed for
some reason.
•
The specified setting data cannot be set
•
Execution is prevented by some other operation being performed
Bit 3
DDE
Device-Dependent Error
This bit is set to 1 when a command cannot be executed due to some
reason other than a command error, a query error or an execution
error.
Bit 2
QYE
Query Error (the output queue is cleared)
This bit is set to 1 when a query error is detected by the output queue
control.
•
When the data overflows the output queue
•
When data in the output queue has been lost
Bit 1
RQC
(Unused)
Not used by this instrument
Request Control
Bit 0
OPC
Operation Complete
•
It indicates the execution of an “
*OPC
” command.
•
It indicates the completion of operations of all messages up to the
“
*OPC
” command