8.6 Things to Know before Beginning Communication
149
8
Standard Event Status Register (SESR) ____________________________
A standard event status register is an 8-bit register.
If even one of the standard status byte register bits enabled by the standard
event status enable register becomes “1,” bit 5 (ESB) of the status byte register
becomes 1.
See
"Standard Event Status Enable Register (SESER)" (p. 150)
The content of the standard event register is cleared at the following times.
• The "
*
CLS"
command is executed.
• An event register query is executed (
*
ESR?
)
• The power is turned on again.
8.6.4 About Event Registers
Standard Event Status Register (SESR)
Bit 7
PON
Power on flag
This becomes “1” when the power is turned on or the unit recovers from a power fail-
ure.
Bit 6
URQ
User request
Unused
Bit 5
CME
Command error (Commands up until the message terminator are ignored.)
This becomes "1" when there is an error with the syntax or meaning of a received
command.
• When there is an error in the program header
• When the number of data items differs from that specified
• When the data format differs from that specified
• When a command not in the unit is received
Bit 4
EXE
Execution error
This becomes "1" when a received command cannot be executed for some reason.
• When the specified data is outside the setting range
• When the specified data cannot be set
• When the command cannot be executed because another function is being used
Bit 3
DDE
Device dependent error
This becomes "1" when a command cannot be executed for a reason other than a
command error, query error, or execution error.
• When the command cannot be executed because there is an internal anomaly
• When data valid for open circuit, short circuit, or load compensation cannot be
incorporated
• When the "i-ovEr Error" indication flashes in the MAIN display area
Bit 2
QYE
Query error (Clears the output queue.)
This becomes "1" when a query error is detected by the controller of the output queue.
• When an attempt was made to read the output queue while it was empty (only for
GP-IB)
• When there is an output queue overflow
• When data in the output queue is lost
Bit 1
RQC
Request control
Unused
Bit 0
OPC
End of operations
This becomes "1" when the operation complete "
*
OPC" command is executed.
• When operations for all messages up until the "
*
OPC" command have ended
Summary of Contents for 3504-40 C HiTester
Page 2: ......
Page 22: ...1 4 Names and Functions of Parts 16 ...
Page 28: ...2 5 Turning the Power On and Off 22 ...
Page 40: ...3 3 Setting the Measurement Conditions 34 OF UF Evaluation Flow Chart ...
Page 66: ...4 4 Self Calibration 60 ...
Page 96: ...5 2 BIN Measurement Function Model 3504 50 3504 60 only 90 ...
Page 136: ...7 4 About Measurement Times 130 ...
Page 286: ...Appendix 7 Initial Settings Table A14 ...
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