hilscher netX 90, Production Manual

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Software architecture 11/70
2.2 Flash layout
2.2.1 Overview
The netX 90 SoC is equipped with the following integrated memory
devices:
COM CPU
· 1024 KB ECC internal flash INTFLASH01, consisting of:
– 512 KB INTFLASH0
– 512 KB INTFLASH1
·
576 KB ECC internal RAM COM INTRAM
·
128 KB ROM
APP CPU
·
512 KB ECC internal flash INTFLASH2
· 64 KB ECC internal RAM APP INTRAM
Flash layout definition
The layout of the flash memory is defined in the “Flash Layout Table” of the
Flash Device Label (FDL) [see also section
FDL Content: Flash Layout
Table [
}
page 30]) for details.
The flash layout definition is thus kept separate from the firmware, which
allows for consistent flash area layout information, regardless whether it is
the regular communication firmware or the maintenance firmware that
accesses this information during booting.
The user can define up to ten flash areas containing either a certain binary
file (like e.g. the firmware) or dedicated space for storing non-file-based
data (see sub-section below). The correct definition of these areas depend
on your netX 90’s firmware use case. The following sections explain the
flash layout use cases in detail.
Note:
The pre-configured FDL templates provided by Hilscher and the
FDLs created by the
New Flash Device Label wizard of netX
Studio CDT already contain the appropriate flash layout definitions
(a.k.a. “area” definitions) according to the individual use cases.
Thus, you do not need to enter the flash area definitions in the FDL
yourself, but can simply pick the right FDL for your use case (A, B
or C).
The details in the following sections are intended to provide some
background knowledge about the flash layout.
netX 90 | Production guide
DOC190101PG03EN | Revision 3 | English | 2019-07 | Released | Public © Hilscher 2019