3 Configuration Modes
3.2 Arora Family of FPGA Products
UG290-2.5.2E
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3.2
Arora Family of FPGA Products
Besides the JTAG configuration mode that is commonly used in the
industry, the Arora Family of FPGA products also support GOWINSEMI's
own configuration mode: GowinCONFIG. The GowinCONFIG configuration
modes that are available and supported for each device depend on the
device model and package. The Arora Family of FPGA Products support
bitstream encryption and security bit setting, which provides safety for user
designs. The Arora Family FPGA products support bitstream
decompression; users can compress bitstream to save storage memory.
Table 3-2 lists the configuration modes that are supported by the Arora
Family FPGA products.
Table 3-2 Configuration Modes
Configuration Modes
MODE[2:0]
1
Description
JTAG
XXX
2
External Host configures Arora Family of
FPGA products via JTAG interface.
GowinCONFIG
MSPI
000
As Master, FPGA reads data from
external Flash (or other devices) via the
SPI interface
3.
SSPI
001
External Host configures Arora Family of
FPGA products via SPI interface.
SERIAL
4
101
External Host configures Arora Family of
FPGA products via DIN interface.
CPU
4
111
External Host configures Arora Family of
FPGA products via DBUS interface.
Note!
[1] The unbound mode pins are grounded by default;
[2] The JTAG configuration mode is independent of MODE value;
[3] The SPI interfaces of the SSPI and MSPI modes are independent of each other;
[4] The CPU configuration mode and SERIAL configuration mode share SCLK,
WE_N and CLKHOLD_N. The data bus pins for the CPU configuration mode share
pins with MSPI and SSPI configuration modes.
Note!
For details about configuration pins, pin reuse, and pin functions and application, please
refer to 5 Configuration Pin.
