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GOWIN GW1NSE Series, User Manual

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2 Overview 

2.4 Pin Quantity 

 

UG874-1.0E 

5(14) 

 

2.4

 

Pin Quantity 

2.4.1

 

Quantity of GW1NSE-2C Pins 

Table 2-3

 

Quantity of GW1NSE-2C

Pins 

Pin Type 

GW1NSE-2C 
QN48 

LQ144 

I/O Single end / Differential 
pair / LVDS

1

 

BANK0

 

11/5/0 

29/14/0 

BANK1 

9/4/2 

16/8/3 

BANK2 

11/5/4 

26/13/6 

BANK3

 

8/3/1 

20/9/2 

Max. User I/O 

2

 

39 

91 

Differential Pair 

17 

44 

True LVDS output 

7 

11 

VCCX 

0 

0 

VCCO0 

0 

0 

VCCO1 

1 

1 

VCCO2 

1 

2 

VCCO3 

0 

2 

VDDDUSB 

0 

1 

VBUSPAD 

0 

1 

VCCO0 

0 

3 

VCCO0/VCCO3

 

1 

0 

VCC/VCCPLL

3

 

2 

0 

VCC/VCCPLL/VDDPL

 

0 

3 

VCCP/VCCX 

2 

0 

VCCX/VDDAUSB

 

0 

3 

VSS 

2 

10 

MODE0 

0 

0 

MODE1 

0 

0 

MODE2 

0 

0 

JTAGSEL_N 

1 

1 

NC 

0 

21 

Note! 

 

[1]Single end/ Differential I/O quantity include CLK pins, and download pins; 

 

[2]The JTAGSEL_N and JTAG pins cannot be used as I/O simultaneously. The data 
in this table is when the loaded four JTAG pins (TCK, TDI, TDO, and TMS) are used 
as I/O;

 

 

[3]Pin multiplexing. 

2.5

 

Pin Definitions 

The location of the pins in the GW1NSE series of SecureFPGA 

Summary of Contents for GW1NSE Series

Page 1: ...GW1NSE series of SecureFPGA Products Package Pinout User Guide UG874 1 0E 06 28 2019 ...

Page 2: ...form or by any denotes electronic mechanical photocopying recording or otherwise without the prior written consent of GOWINSEMI Disclaimer GOWINSEMI assumes no liability and provides no warranty either expressed or implied and is not responsible for any damage incurred to your hardware software data or property resulting from usage of the materials or intellectual property except as outlined in th...

Page 3: ...Revision History Date Version Description 06 28 2019 1 0E Initial version published ...

Page 4: ... Package 3 2 2 Package and Max User I O Information 3 2 3 Power Pin 4 2 4 Pin Quantity 5 2 4 1 Quantity of GW1NSE 2C Pins 5 2 5 Pin Definitions 5 2 6 I O BANK Introduction 8 3 View of Pin Distribution 10 3 1 View of GW1NSE 2C Pins Distribution 11 3 1 1 View of QN48 Pins Distribution 11 3 1 2 View of LQ144Pins Distribution 12 4 Package Diagrams 13 4 1 QN48 Package Outline 6mm x 6mm 13 4 2 LQ144 Pac...

Page 5: ...W1NSE series of SecureFPGA Products I O Bank Distribution 8 Figure 3 1 View of GW1NSE 2C QN48 Pins Distribution Top View 11 Figure 3 2 View of GW1NSE 2C LQ144 Pins Distribution Top View 12 Figure 4 1 Package Outline QN48 13 Figure 4 2 LQ144 Package Outline 14 ...

Page 6: ... Table 2 1 Package Max User I O Information and LVDS Paris 3 Table 2 2 GW1NSE Power Pins 4 Table 2 3 Quantity of GW1NSE 2CPins 5 Table 2 4 Definition of the Pins in the GW1NSE series of FPGA products 6 Table 3 1 Other pins in GW1NSE 2C QN48 11 Table 3 2 Other pins in GW1NSE 2C LQ144 12 ...

Page 7: ...of pin numbers distribution of pins and package diagrams 1 2 Related Documents The user guides are available on the GOWINSEMI Website You can find the related documents at www gowinsemi com 1 DS871 GW1NSE series of SecureFPGA products Data Sheet 2 UG290 Gowin FPGA products Programming and Configuration User Guide 3 UG874 GW1NSE series of SecureFPGA products Package and Pinout 4 UG872 GW1NSE 2C Pin...

Page 8: ...n and Terminology Terminology and Abbreviations Full Name FPGA Field Programmable Gate Array GPIO Gowin Programmable IO QN48 QFN48 LQ144 LQFP144 1 4 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support If you have any questions comments or suggestions please feel free to contact us directly by the following ways Website www gowinsemi com E mail support g...

Page 9: ...ckage The GW1NSE series of SecureFPGA products are PB free in line with the EU ROHS environmental directives The substances used in the GW1NSE series of SecureFPGA products are in full compliance with the IPC 1752 standards 2 2 Package and Max User I O Information Table 2 1 Package Max User I O Information and LVDS Paris Package Pitch mm Size mm GW1NSE 2C QN48 0 4 6 x 6 39 7 LQ144 0 5 22 x 22 91 1...

Page 10: ...2 Overview 2 3 Power Pin UG874 1 0E 4 14 2 3 Power Pin Table 2 2 GW1NSE Power Pins VCC VCCO0 VCCO1 VCCO2 VCCO3 VCCX VSS NC VCCPLL VCCP ...

Page 11: ...VCCO0 0 0 VCCO1 1 1 VCCO2 1 2 VCCO3 0 2 VDDDUSB 0 1 VBUSPAD 0 1 VCCO0 0 3 VCCO0 VCCO3 1 0 VCC VCCPLL3 2 0 VCC VCCPLL VDDPL 0 3 VCCP VCCX 2 0 VCCX VDDAUSB 0 3 VSS 2 10 MODE0 0 0 MODE1 0 0 MODE2 0 0 JTAGSEL_N 1 1 NC 0 21 Note 1 Single end Differential I O quantity include CLK pins and download pins 2 The JTAGSEL_N and JTAG pins cannot be used as I O simultaneously The data in this table is when the ...

Page 12: ...s can be used as user I O when the functions are not used RECONFIG_N I internal weak pull up Start new GowinCONFIG mode when low pulse READY I O When high level the device can be programmed and configured When low level the device cannot be programmed and configured DONE I O High level indicates successful program and configure Low level indicates incomplete or failed to program and configure FAST...

Page 13: ...rnally in SSPI mode or CPU mode Low level SCLK will be disconnected from SSPI mode or CPU mode WE_N I Select data input output of D 7 0 in CPU mode GCLKT_ x I Pins for global clock input T True x global clock No GCLKC_ x I Pins for Global clock input C Comp x global clock No LPLL_T_fb RPLL_T_fb I L R PLL feedback input pin T True LPLL_C_fb RPLL_C_f b I L R PLL feedback input pin C Comp LPLL_T_in R...

Page 14: ...roduction There are four I O Banks in the GW1NSE series of SecureFPGA products The I O BANK Distribution of the GW1NSE series of SecureFPGA products is as shown in Figure 2 1 Figure 2 1 GW1NSE series of SecureFPGA Products I O Bank Distribution GW1NS I O BANK0 I O BANK2 I O BANK1 I O BANK3 This manual provides an overview of the distribution view of the pins in the GW1NSE series of SecureFPGA prod...

Page 15: ...he filling color changes with the BANK denotes the I O in BANK2 The filling color changes with the BANK denotes the I O in BANK3 The filling color changes with the BANK denotes VCC VCCX and VCCO The filling color does not change denotes VSS the filling color does not change denotes NC ...

Page 16: ...3 View of Pin Distribution 2 6 I O BANK Introduction UG874 1 0E 10 14 3View of Pin Distribution ...

Page 17: ... UG874 1 0E 11 14 3 1 View of GW1NSE 2C Pins Distribution 3 1 1 View of QN48 Pins Distribution Figure 3 1 View of GW1NSE 2C QN48 Pins Distribution Top View Table 3 1 Other pins in GW1NSE 2C QN48 VCCO1 25 VCCO2 13 VCCX VCCP 8 36 VCC VCCPLL 12 37 VCCO0 VCCO3 1 VSS 2 26 ...

Page 18: ... View of LQ144Pins Distribution Figure 3 2 View of GW1NSE 2C LQ144 Pins Distribution Top View Table 3 2 Other pins in GW1NSE 2C LQ144 VCCO1 91 VCCO2 37 55 VCCO3 5 26 VCCO0 144 109 127 VCC VDDPL VCCPLL 36 73 108 VCCX VDDAUSB 78 31 103 VBUSPAD 82 VDDDUSB 85 VSS 2 17 33 35 53 74 89 105 107 125 ...

Page 19: ...4Package Diagrams 4 1QN48 Package Outline 6mm x 6mm UG874 1 0E 13 14 4Package Diagrams 4 1 QN48 Package Outline 6mm x 6mm Figure 4 1 Package Outline QN48 ...

Page 20: ...4 Package Diagrams 4 2 LQ144 Package Outline 22mm x 22mm UG874 1 0E 14 14 4 2 LQ144 Package Outline 22mm x 22mm Figure 4 2 LQ144 Package Outline ...

Page 21: ......

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