3 Development Board Circuit
3.3 Power Supply
DBUG391-1.0E
12(20)
3.2.5
Pinout
Table 3-1 FPGA Download Pinout
Name
Pin No.
BANK
Description
I/O Level
TMS
6
0
JTAG Signal
3.3 V
TCK
7
0
JTAG Signal
3.3 V
TDI
3
0
JTAG Signal
3.3 V
TDO
4
0
JTAG Signal
3.3 V
MODE0
10
0
Mode Selection Pin
3.3 V
JTAGSEL_N
8
0
JTAGSEL_N
3.3 V
DONE
9
0
One DONE Indicator
3.3 V
3.3
Power Supply
3.3.1
Overview
The power supply is input from DC5V or USB interface. The DC-DC
power supply chip is used to step down voltage from 5V to 3.3V, 2.8V, 2.5V,
1.8V and 1.2V, which can meet the power demands of the development
board.
