3 Development Board Circuit
3.6 GPIO
DBUG378-1.0E
18(25)
3.6
GPIO
3.6.1
Overview
Eight GPIOs are reserved on development board for user extension
and test.
3.6.2
Pinout
Table 3-5 GPIO Pinout
Name
Pin No.
BANK
I/O Level
F_GPIO0
T20
3
3.3V
F_GPIO1
V22
3
3.3V
F_GPIO2
T19
3
3.3V
F_GPIO3
W22
3
3.3V
F_GPIO4
U19
3
3.3V
F_GPIO5
U20
3
3.3V
F_GPIO6
U18
3
3.3V
F_GPIO7
V20
3
3.3V
3.7
FPC Connector
3.7.1
Overview
To facilitate you to input camera signals to FPGA, 24PIN FPC
connector (FH12-24S-0.5SH) is reserved on the development board.