3 Development Board Circuit
3.2 Download
DBUG378-1.0E
12(25)
3.2.2
USB Download Circuit
Figure 3-1 FPGA USB Download Diagram
F_TMS
F_TCK
F_TDI
F_TDO
USB to JTAG
Chip
USB_D+
USB_D-
N20
N22
M20
M22
U1
U17
GW2A-
LV55PG484
3.2.3
Download Flow
1. FPGA SRAM Download Mode:
Plug the USB cable to the USB interface (J7) on the development
board. Power on, open the Programmer, select SRAM mode, and then
select the bitstream file you required.
2. FPGA MSPI Download Mode:
Plug the USB cable to the USB interface (J7) on the development
board, then power on. Open the Programmer, select External Flash
mode, and then select the bitstream file and FLASH you required. Turn
off the power after downloading. Power on, and then the device will
import the bitstream file to SRAM from the external Flash.
3.2.4
Pinout
Table 3-1 FPGA Download Pinout
Name
Pin No.
BANK
Description
I/O Level
TMS
N22
2
JTAG Signal
3.3V
TCK
N20
2
JTAG Signal
3.3V
TDI
M20
2
JTAG Signal
3.3V
TDO
M22
2
JTAG Signal
3.3V
MODE0
T22
3
Mode selection pin
3.3V
MODE1
U22
3
Mode selection pin
3.3V
MODE2
U21
3
Mode selection pin
3.3V
