Page 30
Specification
Ultra ATA/100
Ultra ATA/66
Ultra ATA/33
PIO Max Transfer Rate
16.6 MB/s
16.6 MB/s
16.6 MB/s
DMA/UDMA designation
UDMA 5
UDMA 4
UDMA 2
DMA/UDMA Max Transfer
100 MB/s
66 MB/s
33 MB/s
Controller Interface
5V
5V
5V
Table 2-1: Supported HDD Specifications
Figure 2-12: IDE Interface
2.6.4 Low Pin Count (LPC) Interface
The ICH8M-E LPC interface complies with the LPC 1.1 specifications. The LPC bus from
the ICH7 is connected to the following components:
Super I/O chipset
Trusted Platform Module (TPM) connector
2.6.5 PCI Interface
The PCI interface on the ICH8M-E is compliant with the PCI Revision 2.3 implementation.
The PCI interface is implemented through the edge connector. Some of the features of the
PCI interface are listed below.
PCI Revision 2.3 compliant
33 MHz
5V tolerant PCI signals (except PME#)
Integrated PCI arbiter supports up to seven PCI bus masters
Summary of Contents for 3308290
Page 1: ...Page i User s Manual S PICMG 1 3 SBC 3308290 Versionx1 0 ...
Page 10: ...Figure 5 21 USB Device Connection 103 Figure 5 22 VGA Connector 104 Page x ...
Page 13: ...Chapter 1 1 Introduction Page 13 ...
Page 19: ...Chapter 2 2 Detailed Specifications Page 19 ...
Page 37: ...Page 37 ...
Page 38: ...Page 38 ...
Page 39: ...Page 39 ...
Page 40: ...Chapter 3 3 Unpacking Page 40 ...
Page 44: ...Chapter 4 4 Connector Pinouts Page 44 ...