
User Guide
GD32VF103T-START
7
4.7.
MCU
Figure 4-7 Schematic diagram of MCU
OSC_IN
OSC_OUT
NRST
BOOT0
+3V3
GND
VDDA
PA3
PA0
PA1
PA2
PA7
PA6
PA5
PA4
PA13
PA12
PA11
PA9
PA8
PA14
PA15
PB1
PB0
PB6
PB7
PB3
PB4
PB5
BOOT0
35
NRST
4
OSC_IN/PD0
2
OSC_OUT/PD1
3
PA0-WKUP
7
PA1
8
PA10
22
PA11
23
PA12
24
PA13/JTMS/SWDIO
25
PA14/JTCK/SWCLK
28
PA15/JTDI
29
PA2
9
PA3
10
PA4
11
PA5
12
PA6
13
PA7
14
PA8
20
PA9
21
PB0
15
PB1
16
PB2/BOOT1
17
PB3/JTDO
30
PB4/JNTRST
31
PB5
32
PB6
33
PB7
34
VDD_1
19
VDD_2
27
VDD_3
1
VDDA
6
VSS_1
18
VSS_2
26
VSS_3
36
VSSA
5
U3
GD32VF103TBU6
JTMS
JTCK
JTDI
JTDO
PA10-Rx
PB2
4.8.
Ardunio
Figure 4-8 Schematic diagram of Ardunio
Ardunio
1
2
3
4
5
6
JP7
HEADER 6
1
2
3
4
5
6
7
8
JP6
HEADER 8
1
2
3
4
5
6
7
8
JP9
HEADER 8
1
2
3
4
5
6
7
8
9
10
JP8
HEADER 10
+5V
+5V
+3V3
+3V3
NRST
A1
A2
A3
A4
A5
D0/Rx
D1/Tx
D2
D4
D3/~
D5/~
D6/~
D7
D8
D9/~
D10/~/CS
D13/CK
D12/SO
D11/~/SI
D14/SDA
D15/SCL
VDDA
PA11
PA12
PA1
PA2
PA3
A4
A5
A6
D13
D12
PA7
D10
PB0
PB1
PB3
PA15
PB4
PB5
PB6
PB7
A6
PA9-Tx
PA10-Rx