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GD32F20x User Manual
836
1: Inverse DA filtering result
2
HMF
Hash multicast filter bit
0: The filter uses perfect mode for filtering multicast frame.
1: The filter uses hash mode for filtering multicast frame
1
HUF
Hash unicast filter bit
0: The filter uses perfect mode for filtering unicast frame
1: The filter uses hash mode for filtering unicast frame
0
PM
Promiscuous mode bit
This bit can make the filter bypassed which means all received frames are thought
pass the filer and DA/SA filtering result status in descriptor is always ‘0’.
0: Promiscuous mode disabled
1: Promiscuous mode enabled
27.4.3.
MAC hash list high register (ENET_MAC_HLH)
Address offset: 0x0008
Reset value: 0x0000 0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
HLH[31:16]
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
HLH[15:0]
rw
Bits
Fields
Descriptions
31:0
HLH[31:0]
Hash list high bits
These bits take the high 32-bit value of hash list
27.4.4.
MAC hash list low register (ENET_MAC_HLL)
Address offset: 0x000C
Reset value: 0x0000 0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
HLL[31:16]
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
HLL[15:0]
rw
Bits
Fields
Descriptions
Summary of Contents for GD32F20 Series
Page 191: ...GD32F20x User Manual 191 Bits Fields Descriptions 31 0 TRNDATA 31 0 32 Bit Random data ...
Page 290: ...GD32F20x User Manual 290 conversion is ongoing ...
Page 325: ...GD32F20x User Manual 325 15 0 ALRM 15 0 RTC alarm value low ...
Page 385: ...GD32F20x User Manual 385 ...
Page 523: ...GD32F20x User Manual 523 clears AERR bit by writing 0 to it ...