GigaDevice Semiconductor GD32F10 Series, User Manual

Page: 325 / 853

GD32F10x User Manual
325
15.2. General level0 timer (TIMERx, x=1, 2, 3, 4)
15.2.1.
Overview
The general level0 timer module (Timer1, 2, 3, 4) is a four-channel timer that supports input
capture, output compare. They can generate PWM signals to control motor or be used for
power management applications. The general level0 time reference is a 16-bit counter that
can be used as an unsigned counter.
In addition, the general level0 timers can be programmed and be used to count or time
external events that drive other timers.
Timer and timer are completely independent, but there may be synchronized to provide a
larger timer with their counters incrementing in unison.
15.2.2.
Characteristics

Total channel num: 4.

Counter width: 16 bits.

Source of count clock is selectable:
internal clock, internal trigger, external input, external trigger.

Multiple counter modes: count up, count down, count up/down.

Quadrature decoder: used for motion tracking and determination of both rotation
direction and position.

Hall sensor: for 3-phase motor control.

Programmable prescaler: 16 bits. Factor can be changed on the go.

Each channel is user-configurable: input capture mode, output compare mode,
programmable PWM mode, single pulse mode

Auto-reload function.

Interrupt output or DMA request on: update, trigger event, and compare/capture event.

Daisy chaining of timer modules to allow a single timer to initiate multiple timing events.

Timer synchronization allows selected timers to start counting on the same clock cycle.

Timer master-slave management.
15.2.3.
Block diagram
Figure 15-31. General Level 0 timer block diagram provides details on the internal