www.geehy.com Page 296
HASH processor (HASH)
Introduction
The hash processor complies with the secure hash algorithm, MD5 hash
algorithm and HMAC hash algorithm. HMAC hash algorithm verifies the
message through hash function. In addition, other algorithms are used to
calculate 2
64
-1-bit message digest. HMAC algorithm includes calling SHA-1 or
MD5 hash function twice.
Note: Only APM32F415xG/APM32F417xExG series products have such module.
Main characteristics
AHB slave peripheral
Rapid calculation of SHA-1 and MD5
It is suitable for data verification application and complies with FIPS PUB
180-2 standard, secure hash standard and and IETF RFC 1321
specification
The input data is 32-bit data, and can support word, half word, byte and
bit string representation methods
The output summary uses 5×32-bit words, and overload can continue
the interrupted message digest calculation
Automatic control of data stream that can be directly accessed by the
memory
It can switch automatically, and conform to the big-end SHA-1
calculation standard
It can be automatically stuffed to complete inputting bit string, so that it
can adapt to the message digest calculation with a modulus number of
512
The 32-bit words abstracted in continuous message block are added to
each other to form the whole message digest
Functional description
When the length of the input message is less than 264 bits, SHA-1 and MD5 will
generate a 160-bit and a 128-bit output bit string respectively, called message
digest. It can be processed by a digital signature algorithm to generate or verify
the signature of the message. Because the message digest is generally much
smaller than messages, the signing message digest generally can improve the
