GE VR11, Reference Manual

Page: 68 / 118

controller provides IRQ [7...1]; the slave interrupt controller provides IRQ
[15...8]. IRQ2 is used to cascade the two controllers, IRQ0 is used as a system
timer interrupt and is tied to interval timer 1, counter 0. The remaining 14
interrupt lines are mapped to various onboard devices. Each 82C59A provides
several internal registers. The interrupts on the IRQ input lines are handled by
two registers, the interrupt request register IRR and the in-service register ISR.
For programming details see the 82C59A data sheet. The VR11 support also
the Interrupt handling of the APIC (Advanced Interrupt Controller). This
handling of the APIC interrupt services must be supported by the operating
system. The I/O APIC handles interrupts very differently than the 8259.
Timer
VME Single Board Computers like the VR11 are equipped with an 8254
compatible timer. This timer contains three counters. Each counter output
provides a key system function. Counter 0 is connected to interrupt controller
input IRQ0 and provides a system timer interrupt for time-of-day, floppy disk
timeout and other system timing functions. Counter 1 generates a refresh
request signal and Counter 2 generates the sound for the speaker.
The following table gives an overview over the 8254 functions.
Table 21: Interval timer functions
Interval Timer Functions
Function Counter 0 (System Timer)
Gate Always on
Clock In 1.193 MHz (OSC/12)
Out IRQ0 (INT1)
Function Counter 1 (Refresh Request)
Gate Always on
Clock In 1.193 MHz (OSC/12)
Out Refresh Request
Function Counter 2 (Speaker Tone)
Gate Programmable via Port $061
Clock In 1.193 MHz (OSC/12)
Out Speaker
The counter/timers are programmed by I/O accesses. A single control word
register controls the operation of all three counters. For more information on
programming and a detailed register description see the 8254 data sheet.
GE Intelligent Platforms – VR11, VP11 Hardware Reference Manual, Second Edition Page 68