GE Mini COM Express 10, Hardware Reference Manual

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6.7 UART Run-Time Registers
UART run-time registers are listed in the following table. The address indicates the offset
from the port base address programmed in the configuration registers.
UART Run-Time Registers
Offset DLAB Name
Description
0x0 0
Receive Buffer
Receive data buffer (read)
Transmit Buffer
Transmit data buffer (write)
0x1 0
Interrupt Enable Interrupt event enable/mask
0x2 X
Interrupt Identification Interrupt event status (read)
FIFO Control
FIFO control settings (write)
0x3 X Line Control
Line control settings
0x4 X Modem Control
Modem control settings
0x5 X Line Status Line status indications
0x6 X Modem Status Modem status indications
0x7 X
Scratchpad Scratchpad data
0x0 1
Divisor Latch (LSB) Least-significant byte of baud-rate divisor
0x1 1
Divisor Latch (MSB) Most-significant byte of baud-rate divisor
6.7.1 Receive Buffer
This register holds the incoming received data after it has been transferred from the
incoming shift register. In FIFO mode, this register contains received data bytes pulled
from the top of the memory buffer.
UART Receive Buffer Register (Offset 0x0, DLAB=0)
Bit Name Access Default
Description
7:0 RXDATA R 0x00 Receive buffer data
6.7.2 Transmit Buffer
This register contains the data to be transmitted. Its contents are automatically transferred
to the outgoing shift register after the previous byte has been shifted out. In FIFO mode,
writes to this register are pushed into the bottom of the memory buffer.
UART Transmit Buffer Register (Offset 0x0, DLAB=0)
Bit Name Access Default
Description
7:0 TXDATA W N/A Transmit buffer data
56 GFK-2896 Mini COM Express Type 10 Module mCOM10-L1500
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