GE MiCOM P40 Agile, Technical Manual, Page: 682 / 962

15 SYSTEM CHECK AND CHECK SYNCHRONISM
This function performs a comparison between the line voltage and the bus voltage.
For a single circuit breaker application, there are two voltage inputs to compare:
● one from the voltage transformer input from the line side of the circuit breaker (Main VT)
●
one from the VT on the bus side of the circuit breaker (CS VT).
For a dual circuit breaker installation (breaker-and-a-half switch or mesh/ring bus), three VT inputs are required:
● one from the common point of the two circuit breakers, identified as the line (Main VT)
●
one from the bus side of CB1 (CB1 CS VT)
● one from the bus side of CB2 (CB2 CS VT)
In most cases the line VT input is three phase, whereas the bus VTs are single phase.
The bus VT inputs are normally single phase so the system voltage checks are made on single phases and the VT
may be connected to either a phase-to-phase or phase to neutral voltage.
For these reasons, the IED has to be programmed with the appropriate connection. The CS Input setting in the CT
AND VT RATIOS column can be set to A-N, B-N, C-N, A-B, B-C or C-A according to the application.
The single-phase bus VT inputs each have associated phase shift and voltage magnitude compensation settings
to compensate for healthy voltage angle and magnitude differences between the check sync VT input and the
selected main VT reference phase. These are:
●
CB1 CS VT PhShft, CB1 CS VT Mag, CB2 CS VT PhShft, CB2 CS VT Mag
Any voltage measurements or comparisons using bus VT inputs are made using the compensated values.
Each circuit breaker controlled can have two stages of check synchronism enabled according to the settings:
● Sys Checks CB1, CB1 CS1 Status, CB1 CS2 Status, Sys Checks CB2, CB2 CS1 Status, CB1 CS2 Status
When the system voltage check conditions are satisfied, the relevant DDB signals are asserted high as follows:
●
DDB (883): CB1 CS1 OK
● DDB (884): CB1 CS2 OK
●
DDB (1577): CB2 CS1 OK
● DDB (1463): CB2 CS2 OK
These DDB signals should be mapped to the monitor/download port and used to indicate that the system check
synchronism condition has been satisfied.
15.1 CHECK SYNCHRONISM PASS
1. Taking note of the check synchronism settings, identify the appropriate VT input terminals and inject voltage
signals that should satisfy the system voltage check synchronism criteria.
2. Check that the DDB signals are asserted high.
15.2 CHECK SYNCHRONISM FAIL
1. Change the voltage signals so that the criteria are not satisfied
2. Check that the appropriate DDB signals are driven low
Chapter 24 - Commissioning Instructions P446SV
650 P446SV-TM-EN-1