GE L60, Instruction Manual, Page: 173 / 498

GE Multilin L60 Line Phase Comparison Relay 5-81
5 SETTINGS 5.5 GROUPED ELEMENTS
5
• 87PC CH1(2) RX VOLT : These settings select a threshold for the signal received from the carrier(s). They are depen-
dent on the carrier nominal output voltage. A value of 10 to 20% of carrier nominal output voltage is recommended.
• 87PC STABILITY ANGLE: This setting is used to select the stability angle for trip security.
• 87PC RESET DELAY : This setting is used to seal-in the output phase comparison element after operating by the time
defined by this setting. A value of 30 ms or higher is recommended. A value of 0 ms operates the element during inte-
grated coincidence only, meaning that operand
87PC OP
output is set and reset on every cycle.
• 87PC TRANS BLOCK PICKUP: This setting increases sensitivity during and after the clearing of an external fault and
prevents false tripping during transient current intervals.
• 87PC TRANS BLOCK RESET: Resets transient blocking and allows tripping.
• 87PC CHNL LOSS TRIP WINDOW: This setting is applicable to the 2TL-UB-DPC-2FC scheme only. If a loss of carrier
is detected in the course of the fault, a trip is allowed for the time defined by this setting (default value is 0). The trip is
blocked after the expiration of this time window.
• 87PC HIGH-SPEED CONTACT 1(2) : These settings allow decreasing of the tripping time by up to ¼ of the power
cycle by bypassing FlexLogic™ execution and sending trip command directly from the 87PC function to the contact
output. These setting are used for breaker 1 and 2 (if used) trip coil connections.
Phase comparison signals are important for the analysis of 87PC operation. As such, they are recorded in oscillography. A
list of the 87PC channels recorded in oscillography is shown below.
Table 5–11: 87PC OSCILLOGRAPHY CHANNELS (Sheet 1 of 2)
CFG FILE LABEL DESCRIPTION
X1: IA Phase A of the F module CT bank
X2: IB Phase B of the F module CT bank
X3: IC Phase C of the F module CT bank
X#: IA Phase A of the X module CT bank
X#: IB Phase B of the X module CT bank
X#: IC Phase C of the X module CT bank
87PC BKR1 Current Effective mixed operating signal of BKR1
87PC BKR1 POS Positive current pulse for the first breaker
87PC BKR1 NEG Negative current pulse for the first breaker
87PC BKR1 Mag Magnitude of the effective operating signal of BKR1
87PC BKR1 FDL Low-set Fault Detection for the first breaker
87PC BKR1 FDH High-set Fault Detection for the first breaker
87PC BKR2 Current Effective mixed operating signal of BKK2
87PC BKR2 POS Positive current pulse for the second breaker
87PC BKR2 NEG Negative current pulse for the second breaker
87PC BKR2 Mag Magnitude of the effective operating signal of BKR2
87PC BKR2 FDL Low-set Fault Detection for the second breaker
87PC BKR2 FDH High-set Fault Detection for the second breaker
87PC POS Positive current local pulse for both breakers
87PC NEG Negative current local pulse for both breakers
87PC FDL Low-set Fault Detection for both breakers
87PC FDH High-set Fault Detection for both breakers
87PC Rx1P Voltage Received pulse (voltage) on channel 1P
87PC Rx1P Received pulse on channel 1P
87PC Rx1N Voltage Received (voltage) on channel 1N
87PC Rx1N Received pulse on channel 1N
87PC Rx2P Voltage Received pulse (voltage) on channel 2P
87PC Rx2P Received pulse on channel 2P
87PC Rx2N Voltage Received pulse (voltage) on channel 2N