342-86400-498PS
Issue 1.2
April 2012
Page 172
Copyright
GE Multilin Inc. 2010-2012
APPENDIX H
LIST OF ACRONYMS
ACK
Acknowledge
AIS
Alarm Indication Signal
ANSI
American National Standards Institute
BER
Bit Error Rate
BPDU
Bridge Protocol Data Unit
CBW
Configurable BandWidth (a JungleMUX term for a port with
N x STS-1 SPE capacity)
CI
Craft Interface
CPU
Central Processing Unit
CRC
Cyclic Redundancy Check
CV
Code Violation (a term for an errored bit)
DA
Destination Address (48-bit MAC-
address of frame‟s source;
carried in Ethernet frame‟s bytes #1 - 6)
DC
Direct Current
DMI
Diagnostic Monitoring Interface
DPV
Destination Port Vector
D-PVLAN Distributed Port-Based VLAN
EAS
Electronic Assembly Schematic
EIA
Electronic Industries Association
EMI
Electromagnetic Interference
ESDS
Electrostatic Discharge Sensitive
FCS
Frame Check Sequence
FDX
Full Duplex
FEC
Fast Ethernet Controller (the Ethernet MAC module in the CPU)
FEFI
Far-End Fault Indication
FIFO
First In First Out
FPGA
Field Programmable Logic Gate Array
GARP
General Attribute Registration Protocol (layer-2 multicast protocol)
GOOSE
Generic Object Oriented Substation Events
GSE
Generic Substation Events
HDX
Half Duplex
ID
Identification
IEC
International Electrotechnical Commission
IED
Intelligent Electronic Devices