Publication No. IMP2B-0HH/5
Functional Description 33
3.15.12
EPLD Interrupt Register – Offset 0x00000020
This controls ‘if’ and ‘what’ drives the EPLD_INT~ signal to the MV64560 MPP(19)
input.
Table
3-20 EPLD Interrupt Register
Bit Mode
Description
Notes
0
Read only
RTC interrupt
0 = Line low (active)
1 = Line high
1
Read only
Temperature interrupt
2
Read only
Temperature Critical interrupt
3
Read only
PHY0 interrupt
4
Read only
PHY2 interrupt
5
Read only
USB Port 0 Overload interrupt
6
Read only
USB Port 1 Overload interrupt
7
Read only
Reserved
Returns ‘0’
8
Read/Write RTC Interrupt mask
0 = Enabled
1 = Masked (default)
9
Read/Write Temperature Interrupt mask
10
Read/Write Temperature Critical Interrupt mask
11
Read/Write PHY0 Interrupt mask
12
Read/Write PHY2 Interrupt mask
13
Read/Write USB Port 0 Overload Interrupt mask
14
Read/Write USB Port 1 Overload Interrupt mask
15
Read/Write Software generate for EPLD_INT#
0 = Drive EPLD_INT# low
1 = Undriven
3.15.13
Software Reset Register – Offset 0x00000040
Table
3-21 Software Reset Register
Bits
Mode
Description
Notes
15 to 0
Read/Write
Software reset
Write 0x467A to generate a reset; writing any other value will have no
effect. Power-up value = 0x0