GatesAir Intraplex DS-64NC, Installation And Operation Manual

Page: 13 / 68

GatesAir 2-1
Intraplex Products
Section 2 – Functional Description
2.1 Timing
Transmit-side and receive-side timing are completely independent of each other. The module includes
two DDS (direct digital synthesis) clock generators that have a maximum jitter output of 30.52 nS
peak-to-peak (6%, or 0.06 UI, maximum at 1.984 Mbps).
The timing outputs can be set to any integer multiple of 8000 bits per second (8 kbps). The maximum
data rate is determined by the number of payload time slots in the multiplexed signal. In a T1 or T1-
based variable rate system there are 24 time slots, for a maximum data rate of 1.536 Mbps. In a 2 MB
system there are 31 time slots, or 30 time slots if CAS multiframe is in use, giving maximum data
rates of 1.984 Mbps or 1.920 Mbps respectively. A 2 MB-based variable rate system provides a
maximum data rate of 2.040 Mbps.
The module also includes a master-clock synthesizer (at either 1.544 or 2.048 MHz) that is frequency-
locked to one of the timing inputs at the data interface. This synthesizer allows network timing to
follow the data rate precisely, within the tolerance specified by the network.
2.2 Buffering
The transmit-side and receive-side each have first-in, first-out (FIFO) buffers with a depth of 12,000
bits. The starting depth of these buffers can be set either to 256 bits for normal synchronous
operation, or to half the full depth (6000 bits) for plesiochronous operation. The buffer can be
recentered by remote control.
The current depth of each FIFO (transmit side and receive side) is maintained in a performance
register, which can be read by remote access (Section 2.5.2). This register may be used to implement
“intelligent” reset algorithms; for example, “reset at midnight unless already within 1/8 of center.”
This status information is available via the multiplexer’s remote port.