22
4.10.3
Live Probes Header
The Avalanche Board provides an header (P4) called Active Probes. Active Probes enable you
to read or change the values of probe points in a design through JTAG. The value of probe
points may be changed for various reasons, such as:
To verify that a reset signal is in the active and required state.
To test a logic function by writing to a probe point.
To initiate a state machine transition by quickly setting an input value to isolate a
control flow problem.
Active Probes dynamically and asynchronously read or write to any logic element register bit.
The probe points of a design are selected using Active Probes option when debugging FPGA
Array in Smart Debug. Active Probes are particularly useful for a quick observation of an
internal signal.
Figure 16 - Live Probes Header
4.10.4
SFP+ Connector
The Avalanche Board has a SFP+ connector (J11) to support the optical interface with an
external interface module. Prior of usage, a SFP Cage needs to be installed on the Avalanche
Board.
SFP+ Pin
Number –
J11
Description
PolarFire FPGA
Pin Number
Bank
1
GND
2
TxFault
D14
Bank 2
3
TxDis
F11
Bank 2
4
SDA
F13
Bank 2
5
SCL
E8
Bank 2
6
ModDef0
F15
Bank 2
7
RS0
D16
Bank 2
8
LOS
D17
Bank 2
9
RS1
D16
Bank 2
10
GND
11
GND
12
RD-
A19
13
RD+
A20
14
GND
15
+3.3V
PolarFire FPGA
A10
A11
P4
