Fujitsu SK-MB9EF120-002, User Manual

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SK-MB9EF120-002,-003
Connectors
UG-9E0010-11
- 20 - © Fujitsu Semiconductor Europe GmbH
MCU-Ports
Port Pin Pin Port Port Pin Pin Port
65 66 P2_21 153 154 P2_23
67 68 155 156
69 70 P2_24 157 158 P1_39
71 72 P2_25 159 160
73 74 161 162
75 76 P1_48 163 164 P1_54
77 78 P1_49 165 166 P1_55
79 80 P1_50 167 168 P1_56
81 82 P1_51 169 170 P1_57
83 84 P1_52 171 172 P1_58
85 86 P1_53 173 174 P1_59
87 88 175 176
89 90 177 178
91 92 179 180
93 94
5.2 Debug Connector (X2)
This is an ARM-standard 20 pin JTAG connector.
Pin Signal Description
1 Vsns Target voltage reference
2 VCCt Target power
3 nTRST JTAG TAP reset, active low
4 GND Ground
5 TDI JTAG Test Data In
6 GND Ground
7 TMS JTAG Test Machine State
8 GND Ground
9 TCK JTAG TAP Clock
10 GND Ground
11 RTCK Return TCK (optional)
12 GND Ground
13 TDO JTAG Test Data Out
14 GND Ground
15 nRESET Target reset, active low (system reset)
16 GND Ground
17 DBREQ Debug Request (not used)
18 GND Ground
19 TVcc Debug Acknowledge (not used)
20 GND Ground
RTCK is deactivated by default. To enable it, a 0R0 resistor (soldering jumper, see there) must be
soldered. The feature is only required for high-speed clocking.
This connector must not be used at the same time as the trace-connector.