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C141-E106-01EN
5 - 16
5.3.2
Command descriptions
The contents of the I/O registers to be necessary for issuing a command and the example
indication of the I/O registers at command completion are shown as following in this subsection.
Example: READ SECTOR(S)
At command issuance (I/O registers setting contents)
Bit
7
6
5
4
3
2
1
0
1F7
H
(CM)
0
0
1
0
0
0
0
0
1F6
H
(DH)
×
L
×
DV
Head No. / LBA [MSB]
1F5
H
(CH)
Start cylinder address [MSB] / LBA
1F4
H
(CL)
Start cylinder address [LSB] / LBA
1F3
H
(SN)
Start sector No.
/ LBA [LSB]
1F2
H
(SC)
Transfer sector count
1F1
H
(FR)
xx
At command completion (I/O registers contents to be read)
Bit
7
6
5
4
3
2
1
0
1F7
H
(ST)
Error information
1F6
H
(DH)
×
L
×
DV
End Head No. / LBA [MSB]
1F5
H
(CH)
End cylinder address [MSB] / LBA
1F4
H
(CL)
End cylinder address [LSB] / LBA
1F3
H
(SN)
End sector No.
/ LBA [LSB]
1F2
H
(SC)
X‘00’
1F1
H
(ER)
Error information
CM: Command register
FR: Features register
DH: Device/Head register
ST: Status register
CH: Cylinder High register
ER: Error register
CL: Cylinder Low register
L: LBA (logical block address) setting bit
SN: Sector Number register
DV: Device address. bit
SC: Sector Count register
x, xx: Do not care (no necessary to set)
Summary of Contents for MPF3102AH
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