Fujitsu MB91F465XA Application Note Download

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MB91F465XA EMULATION

Chapter 5 Appendix

- 33 -

MCU-AN-300015-E-V11

Bit

Name

Function

Bit 31

MBSUE:

Message buffer Status

update enable

This bit controls the Message buffer status update
ports: MBSU_RX1; MBSU_TX1, MBSU_TX2,
MBSU_RX2

"0": Disabled

"1": Enabled

<<Note>>

If enabled output “High” at every Message buffer
status update. High duration: One RAM clock cycle.

If “0“ is set outputs “L” at pin.

Bit 30

CYCSE:

Cycle start output

enable

This bit controls the Cycle start output

"0": Disabled

"1": Enabled

<<Note>>

If enabled output “High” at every cycle start. High
duration: One RAM clock cycle

If “0“ is set outputs “L” at pin.

Bit 29

MTE:

Start of Macrotick

output enable

This bit controls the Macrotick start output

"0"

Disabled

"1"

Enabled

<<Note>>
If enabled output “High” at every Macrotick start.
High duration: One RAM clock cycle
If “0“ is set outputs “L” at pin.

Bit 28

SDSE:

Start of dynamic

segment output enable

This bit controls the start of dynamic segment output

"0": Disabled

"1": Enabled

<<Note>>
If enabled Output “High” at every start of dynamic
segment. High duration: One RAM clock cycle
If “0“ is set outputs “L” at pin.

Bit 27

CYCS0E:

Start of cycle 0 output

enable

This bit controls the Cycle 0 start output

"0": Disabled

"1": Enabled

<<Note>>
If enabled output “High” at every cycle 0 start. High
duration: One RAM clock cycle
If “0“ is set outputs “L” at pin.

Bit 26 –

Bit 16

RSV: Reserved

These bits are reserved. "0" is read. Write "0".

Table 5-3: DBGS Bit description

Summary of Contents for MB91F465XA

Page 1: ...The following document contains information on Cypress products ...

Page 2: ...ver current levels and other abnormal operating conditions If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan the US Export Administration Regulations or the applicable laws of any other country the prior authorization by the respective government entity will be required for ...

Page 3: ...Fujitsu Microelectronics Europe Application Note MCU AN 300015 E V11 FR FAMILY 32 BIT MICROCONTROLLER MB91F465XA MB91F465XA EMULATION APPLICATION NOTE ...

Page 4: ...ry MCU AN 300015 E V11 2 Fujitsu Microelectronics Europe GmbH Revision History Date Issue 2007 04 24 V1 0 MSt Initial Version 2007 06 26 V1 1 MSt Further description added typos corrected Figure 2 5 added This document contains 40 pages ...

Page 5: ...y the customer 2 Should a Product turn out to be defect Fujitsu Microelectronics Europe GmbH s entire liability and the customer s exclusive remedy shall be at Fujitsu Microelectronics Europe GmbH s sole discretion either return of the purchase price and the license fee or replacement of the Product or parts thereof if the Product is returned to Fujitsu Microelectronics Europe GmbH in original pac...

Page 6: ...ay IP version 14 3 2 5 CIF0 CUST0 register value Customer Register 14 3 2 6 CREL register value Core Release Register 14 3 2 7 E Ray clock control register 14 3 2 8 E Ray Interrupts 15 3 2 9 Interrupt Vector Table file vectors c 15 3 2 10 DMA 16 4 SOFTUNE WORKBENCH 17 4 1 Update of Softune Workbench 17 4 2 Template Workspace for MB91F465XA series 17 A muster of the macro switch is 18 4 2 1 Use Con...

Page 7: ...MB91F465XA EMULATION Contents Fujitsu Microelectronics Europe GmbH 5 MCU AN 300015 E V11 5 2 2 Vectors c file 37 5 3 Related Documentation 39 5 4 Figures 40 5 5 Tables 40 ...

Page 8: ...note describes the emulation system for MB91F465XA series The current emulation system is based on EVA device MB91V460A which does not include a FlexRay interface For that reason the FlexRay interface is emulated by MB88121B series stand alone FlexRay communication controller The MB88121B is connected to the bus interface of MB91V460A ...

Page 9: ... 1 MB2198 01 Emulator Main Unit 2 MB2198 10 DSU4 cable 3 EMA MB91V460A 00x Adapter board including MB91V460A 4 EMA MB91V460A 100 FlexRay extension board including MB88121B 5 EMA MB91F465X NLS 100M20 Socket adapter board 6 NQPack100SD ND Socket for package FPT 100P M20 Tokyo Eletech Corp www tetc co jp e_tet htm On the target system a NQPack100SD ND socket is required enabling connection to EMA MB9...

Page 10: ... and software installation e g USB drivers 1 Connect the EMA MB91F465X NLS 100M20 socket adapter board to the NQPack100SD ND of the target hardware PCB The target hardware must use a socket otherwise it is not possible to connect the socket adapter board to the target board Fasten the four screws using the screw driver delivered in the package Figure 2 2 EMA MB91F465X NLS 100M20 at target system N...

Page 11: ...oard The placement of the four connectors allows one position only Figure 2 3 EMA MB91V460 00x on top of EMA MB91F465X NLS 100M20 3 The EMA MB91V460A 100 extension board must be plugged into the two connectors at top of the EMA MB91V460A 00x board Again the position of the connectors allows only one possible connection Figure 2 4 EMA MB91V460A 100 on top of EMA MB91V460A 00x ...

Page 12: ...urope GmbH Figure 2 5 An overview 4 Connect the MB2198 01 DSU cable to the MB2198 01 Emulator and to the EMA 91V460A 00x board Figure 2 6 MB2198 10 connected to MB2198 01 and EMA MB91V460A 00x 5 Plug in the power supply of MB2198 01 EMA MB91V460A 00x and the target system into the according plugs ...

Page 13: ...possible Following order should be used to power up the emulation system 1 Emulator MB2198 01 2 Adapter board EMA MB91V460A 00x 3 Target system To power down the system use the inverse order 1 Target system 2 Adapter board EMA MB91V460A 00x 3 Emulator MB2198 01 Note When using the Fujitsu SK 91465X 100PMC evaluation board the polarity of power supply is contrary to that of the EMA MB91V460A 00x ...

Page 14: ...80 MHz 100MHz FlexRay Port 31 Not available Must be set E Ray Register start address 0x50 0000 0x00 D000 E Ray IP version 1 0 RC1 1 0 CIF0 CUST0 Register value 0x0430 79FF 0x04FF5BFF CREL Register value 0x0726 0412 0x1006 0519 E Ray Clock Register CIF1 CUST1 register PLL2 registers E Ray Interrupts E Ray interrupts connected to external Interrupts E Ray interrupts set in E Ray interrupt register I...

Page 15: ...gister PFR the pin function is specified MB91F465XA Port 31 must be set to peripheral function PFR 1 otherwise the FlexRay functionality is not connected to the pins Emulation system The FlexRay functionality is always available at port 31 It is not possible to use the general I O Port function For further details refer to MB91460A series Hardware Manual and MB91F465XA series Datasheet Recommended...

Page 16: ...XA series 0x04FF 5BFF The value of register CIF0 address 0x500000 by MB88121B 0x0430 79FF For further details refer to MB88121 and MB91F465XA series Datasheet 3 2 6 CREL register value Core Release Register The value of register CREL address 0x00D3F0 by MB91F465XA series 0x1006 0519 The value of register CREL address 0x5003F0 by MB88121B 0x0726 0412 The CREL register might be used by software to i...

Page 17: ...ected to three MCU external interrupts inputs E Ray interrupt line0 is connected to external interrupt 15 E Ray interrupt line1 is connected to external interrupt 13 E Ray interrupt timer 0 and timer 1 are connected to external interrupt 11 In addition to the E Ray interrupt registers the according external interrupt registers must also be set Rising edge detection should be chosen Port function m...

Page 18: ...MB91F465XA series contains the file vector c where the interrupt vector table can be specified 3 2 10 DMA To speed up the data transfer from output buffer or to input buffer it is possible to launch a DMA transfer MB91F465XA In MB91F465XA series register CIF1 address 0x00D004 and CIF2 address 0x00D008 are used to setup the DMA transfer Emulation system In emulation system the DMA transfer is reali...

Page 19: ... project is to make a copy of the template project and use this copy as a start up The template includes the latest start91460 asm file MCU header file mb91465x h and mb91465x_emulator h IRQ table vectors c basic linker and C Compiler settings Note Due to the differences between the FlexRay communication controller in MB91F465XA and emulation system two configurations are available STANDALONE for ...

Page 20: ...late project the files main c and vector c have already used this macro switch Further source files of the project which require the header file should use the above mentioned macro switch The interrupt vector table and ICR registers in file vector c are set according to the switch selection The ICR registers define the interrupt level for the corresponding entry of the interrupt vector table See ...

Page 21: ...ansfers are already performed for specific data sections e g INIT Be aware of the maximum frequency of 80 MHz for emulation system Set the PLL accordingly Check module vectors c if any interrupts are used for proper vector table set up Write application code in the module main c or add any other module to the project Write and modify source code and settings corresponding to the needs of the appli...

Page 22: ... 300015 E V11 20 Fujitsu Microelectronics Europe GmbH Figure 4 2 Open Softune Workbench Linker mapping file Check linker mapping list in the mp1 file by right click on 91460_template_91f465X abs Open List File mp1 Figure 4 3 Softune Workbench Linker Mapping ...

Page 23: ...U AN 300015 E V11 Start Softune Emulator Debugger via the Debug Command Figure 4 4 Start Softune Workbench Emulator Debugger There are three possible connections between MB2198 01 Emulator and PC COM1 MB2198 01 COM1 sup LAN MB2198 01 LAN sup USB MB2198 01 USB sup Select the suitable interface ...

Page 24: ...B88121B is connected at CS3 By asserting Reset during debugging the MB91V460A is reset Also CS3 is getting inactive To activate it again the customize button 1 can be used By pressing the button the set_CS3 prc will be executed which initialises CS3 Click on customize button 1 to execute set_CS prc after asserting Reset Figure 4 5 Emulator Debug session use Customize button 1 If the customize butt...

Page 25: ...d restore the Flash chip into the socket The macro switch Emulator is set to 0 The header file and interrupt vector table for MB91F465XA series are included Recompile the project With the Flash programming utility e g Fujitsu Flashprogrammer program the generated mhx file Motorola S Record located in sub folder STANDALONE ABS mhx into the internal Flash of MB91F465XA series ...

Page 26: ... LCK Lock Register 0x0000 0000 R W Interrupt Register 0x0020 EIR Error Interrupt Register 0x0000 0000 R W 0x024 SIR Status Interrupt Register 0x0000 0000 R W 0x0028 EILS Error Interrupt Line Select 0x0000 0000 R W 0x002C SILS Status Interrupt Line Select 0x0303 FFFF R W 0x0030 EIES Error Interrupt Enable Set 0x0000 0000 R W 0x0034 EIER Error Interrupt Enable Reset 0x0000 0000 R W 0x0038 SIES Statu...

Page 27: ...ster 4 0x0008 0007 R W 0x00B0 GTUC5 GTU Configuration Register 5 0x0E00 0000 R W 0x00B4 GTUC6 GTU Configuration Register 6 0x0002 0000 R W 0x00B8 GTUC7 GTU Configuration Register 7 0x0002 0004 R W 0x00BC GTUC8 GTU Configuration Register 8 0x0000 0002 R W 0x00C0 GTUC9 GTU Configuration Register 9 0x0000 0101 R W 0x00C4 GTUC10 GTU Configuration Register 10 0x0002 0005 R W 0x00C8 GTUC11 GTU Configura...

Page 28: ...Message Buffer Status Register 0x0310 MHDS Message Handler Status 0x0000 0000 R W 0x0314 LDTS Last Dynamic Transmit Slot 0x0000 0000 R W 0x0318 FSR FIFO Status Register 0x0000 0000 R W 0x031C MHDF Message Handler Constraints Flags 0x0000 0000 R W 0x0320 TXRQ1 Transmission Request 1 0x0000 0000 R 0x0324 TXRQ2 Transmission Request 2 0x0000 0000 R 0x0328 TXRQ3 Transmission Request 3 0x0000 0000 R 0x0...

Page 29: ...00 0000 R W 0x0508 WRHS3 Write Header Section 3 0x0000 0000 R W 0x050C Reserved 0x0000 0000 R W 0x0510 IBCM Input Buffer Command Mask 0x0000 0000 R W 0x0514 IBCR Input Buffer Command Request 0x0000 0000 R W 0x0518 0x05FC Reserved 0x0000 0000 R W Output Buffer 0x0600 0x06FC RDDSn Read Data Section 1 64 0x0000 0000 R 0x0700 RDHS1 Read Header Section 1 0x0000 0000 R 0x0704 RDHS2 Read Header Section 2...

Page 30: ...1 1 Select the oscillation clock X0 X1 Supply the system clock for FlexRay Controller Select the PLL clock PLL Multiplier Selection X0 X1 4MHz x 20 80MHz X0 X1 5MHz x 16 80MHz X0 X1 8MHz x 10 80MHz X0 X1 10MHz x 8 80MHz RCLK bit4 0 1 RAM Clock Selection MB88121A B only Select System Clock Select System Clock divided by 2 STOP bit5 0 1 Clock Stop Stop the system clock for FlexRay Controller These b...

Page 31: ... be changed Bit 6 RSV Reserved This bit is reserved Always write 0 Bit 5 STOP Clock Stop This bit stops the system clock If this bit set to 1 the system clock is stopped But the oscillator is active When this bit is set to 1 please carry out the following procedures PLL On 1 Stop receiving and transmitting for FlexRay controller 2 Set 0 to SSEL bit 3 Set 0 to PON bit 4 Set 1 to STOP bit PLL Off 1 ...

Page 32: ...or MB88121B the evaluation of the PLL performance is pending For this reason do not use other settings than PMUL 1 0 11 PMUL 1 PMUL 0 Function 0 0 X0 X1 4MHz x 20 80MHz tbd 0 1 X0 X1 5MHz x 16 80MHz tbd 1 0 X0 X1 8MHz x 10 80MHz tbd 1 1 X0 X1 10MHz x 8 80MHz Note These bits must be changed before PON bit is set to 1 Bit1 SSEL System Clock Selection This bit selects the system clock 0 Select the cl...

Page 33: ...tronics Europe GmbH 31 MCU AN 300015 E V11 Bit Name Function Bit0 PON PLL Oscillator Enable This bit controls PLL oscillator 0 Stop PLL oscillator 1 PLL oscillator enable Note This bit must be changed when SSEL bit is 0 Table 5 2 CCNT Register Bit description ...

Page 34: ...e only in MB88121B It is reserved in MB88121 A Bits 31 27 are available in MB88121B only For MB88121 A they are reserved Address 0x0008 R R W Read only Read Write RSV 16 26 R W MBSUE 31 R W MTE 29 R W CYCSE 30 R W SD SE 28 R W CYCS0E 27 R W CYCS0E bit27 0 1 Output L Cycle Start 0 Enable Output start of cycle 0 SDSE bit28 0 1 Start of Dynamic Segment Enable Output L Output start of dynamic segment ...

Page 35: ...uts L at pin Bit 29 MTE Start of Macrotick output enable This bit controls the Macrotick start output 0 Disabled 1 Enabled Note If enabled output High at every Macrotick start High duration One RAM clock cycle If 0 is set outputs L at pin Bit 28 SDSE Start of dynamic segment output enable This bit controls the start of dynamic segment output 0 Disabled 1 Enabled Note If enabled Output High at ever...

Page 36: ...ve level for DMA request is L RSV bit31 bit3 Reserved Write 0 0 is read R R W Read only Read Write Bit Name Function Bit 15 3 RSV Reserved These bits are reserved 0 is read Write 0 Bit 2 DMAINV DMA Request Level Inverted This bit controls the DMA request level 0 Active level for DMA request is H 1 Active level for DMA request is L Note It is valid when DMAOE bit is 1 Bit 1 DMARE DMA Request enable...

Page 37: ... CCNT uint32_t 0x500004 Init_rldtmr_3 600u 0x0802 initialise reload timer 3 if EMULATOR 0 set PLL2 of MB91F465XA PLL2DIVM 1 PLL2DIVN 0x13 PLL2DIVG 0 PLL2MULG 0 PLL2CLKR 0x04 enable PLL BCLCK SCLK enabled wait for PLL Oscillaition stabilisation TBCR 0x08 setup Timebase Timer CTBR 0x00 clear TBT count register while TBCR_TBIF wait until timer finished PLL2CLKR 0x02 switch to PLL2 clock EPFR31 0x77 s...

Page 38: ...LECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR ELIGIBILITY FOR ANY PURPOSES C Fujitsu Microelectronics Europe GmbH void Init_rldtmr_3 uint16_t rldvalue uint16_t setup TMCSR3_CNTE 0 stop reload Timer TMRLR3 rldvalue set reload value TMCSR3 setup void start_rldtmr_3 void TMCSR3_TRG 1 start count operation void enable_rldtmr_3 void TMCSR3_CNTE 1 enable reload Timer operation wait...

Page 39: ...OR 0 include mb91465x h else include mb91465x_emulator h endif InitIrqLevels This function pre sets all interrupt control registers It can be used to set all interrupt priorities in static applications If this file contains assignments to dedicated resources verify that the appropriate controller is used Not all devices of the MB91460 Series offer all recources NOTE value 31 disables the interrupt...

Page 40: ...r 29 External Interrupt 13 pragma intvect DefaultIRQHandler 31 External Interrupt 15 else pragma intvect DefaultIRQHandler 27 External Interrupt 11 FlexRay Timer 0 timer 1 pragma intvect DefaultIRQHandler 29 External Interrupt 13 FlexRay INT1 pragma intvect DefaultIRQHandler 31 External Interrupt 15 FlexRay INT0 endif if EMULATOR 0 pragma intvect DefaultIRQHandler 84 FlexRay INT0 line pragma intve...

Page 41: ...mb2198_getting_started pdf EMULATING AND DEBUGGING WITH SOFTUNE AND MB2198 01 mcu an 391028 e xx mb2198_emulation pdf GETTING STARTED mcu an 300005 e vxx mb91v460_getting_started pdf Documentation MB91460A series Hardware Manual MB91F465XA series Datasheet MB88121 series Datasheet E Ray User s Manual EMA MB91V460A 00x User Guide EMA MB91V460A 100 FlexRay extension board User Guide EMA MB91F465X NL...

Page 42: ...tion selection 19 Figure 4 2 Open Softune Workbench Linker mapping file 20 Figure 4 3 Softune Workbench Linker Mapping 20 Figure 4 4 Start Softune Workbench Emulator Debugger 21 Figure 4 5 Emulator Debug session use Customize button 1 22 Figure 4 6 View customize bar 22 Figure 5 1 FlexRay Clock settings 35 Figure 5 2 Reload Timer functions 36 Figure 5 3 Vector c file macro switch settings 38 5 5 T...

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