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CHAPTER 23 512K / 1024K BIT FLASH MEMORY
23.5.2
Toggle Bit Flag (DQ6)
The toggle bit flag specifies whether the automatic algorithm is being executed or has
been terminated, using the toggle bit function, the same as the data polling flag. Table
23.5-4 shows the toggle bit flag status transition.
■
When the Write Operation or Chip/Sector Deletion Operation is Executed.
When the continuous read/access is executed during the automatic write algorithm or chip/sector deletion
algorithm execution, the flash memory outputs the toggle status, in which "1" and "0" are alternately output
for each read operation, irrespective of the specified address. If the continuous read/access is executed at
the end of the automatic write algorithm or chip/sector deletion algorithm, the flash memory stops the
toggle operation in bit6 and outputs the data of bit6 (DATA:6) in the specified read address.
■
When the Sector Deletion Temporary Stop is Executed.
When the read/access is executed while executing the sector deletion temporary stop, the flash memory
outputs "1" if the specified address belongs to the sector being deleted. The flash memory outputs the data
of bit6 (DATA:6) in the specified read address unless the specified address belongs to the sector being
deleted.
Reference:
When executing the write operation, the toggle bit executes the toggle operation for about 2 ms, then
terminates it without rewriting the data, if the sector to be written is write-protected.
When executing the deletion operation, the toggle bit executes the toggle operation for about 100
ms, then returns to the read/reset status without rewriting the data, if all the selected sectors are
protected from rewriting.
Toggle Bit Flag Status Transition
Table 23.5-4 Toggle Bit Flag Status Transition
Oper
a
ting
s
t
a
t
us
Write oper
a
tion
--> Completion
Chip/
s
ector
deletion
-->Completion
S
ector deletion
w
a
it-->
S
t
a
rt
DQ6
Toggle
DATA:6
S
ector deletion
tempor
a
ry
s
top
-->Re
s
t
a
rt
(
S
ector
b
eing
deleted)
D
u
ring the
s
ector
deletion tempor
a
ry
s
top (
S
ector not
S
ector deletion
-->Deletion
tempor
a
ry
s
top
(
S
ector
b
eing
deleted)
Oper
a
ting
s
t
a
t
us
Write oper
a
tion
Chip/
s
ector deletion oper
a
tion
DQ6
-
S
t
a
t
us
tr
a
n
s
ition d
u
ring
ab
norm
a
l oper
a
tion
-
S
t
a
t
us
tr
a
n
s
ition d
u
ring norm
a
l oper
a
tion
Toggle
-->DATA:6
Toggle-->
S
top
Toggle-->1
1-->Toggle
Toggle
Toggle
b
eing deleted)
Summary of Contents for MB90460 Series
Page 1: ...The following document contains information on Cypress products ...
Page 3: ......
Page 5: ......
Page 9: ...iv ...
Page 41: ...22 CHAPTER 1 OVERVIEW ...
Page 45: ...26 CHAPTER 2 NOTES ON HANDLING DEVICES ...
Page 83: ...64 CHAPTER 3 CPU ...
Page 95: ...76 CHAPTER 4 RESET ...
Page 107: ...88 CHAPTER 5 CLOCK ...
Page 131: ...112 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 175: ...156 CHAPTER 7 INTERRUPT ...
Page 181: ...162 CHAPTER 8 MODE SETTING ...
Page 223: ...204 CHAPTER 9 I O PORT ...
Page 237: ...218 CHAPTER 10 TIME BASE TIMER ...
Page 247: ...228 CHAPTER 11 WATCHDOG TIMER ...
Page 275: ...256 CHAPTER 12 16 BIT RELOAD TIMER ...
Page 373: ...354 CHAPTER 14 MULTI FUNCTIONAL TIMER ...
Page 485: ...466 CHAPTER 16 PWC Timer ...
Page 531: ...512 CHAPTER 17 UART ...
Page 559: ...540 CHAPTER 19 DELAYED INTERRUPT GENERATOR MODULE ...
Page 589: ...570 CHAPTER 20 8 10 BIT A D CONVERTER ...
Page 601: ...582 CHAPTER 21 ROM CORRECTION FUNCTION ...
Page 633: ...614 CHAPTER 23 512K 1024K BIT FLASH MEMORY ...
Page 645: ...626 CHAPTER 24 EXAMPLE OF F2 MC 16LX MB90F462 F462A F463A CONNECTION FOR SERIAL WRITING ...
Page 715: ...696 APPENDIX ...
Page 716: ...697 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 739: ......